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Don't Forget the Software The road to good system-on-a-chip intentions is paved with software. EDA companies must rise to the occasion with new and better codesign tools. by Michael Kaskowitz

We've all heard the mantra before: "With the ever-increasing gate count available, all systems will be reduced to a single chip." To help meet the needs of the system-on-a-chip (SOC) revolution, EDA companies have been feverishly designing new tools and methodologies to assist the hardware engineer. Yet despite those advances, relatively few single-chip system-based products have succeeded. Why? The major roadblock to successful SOC designs isn't the hardware design complexity--it's the software.

How often have you overheard the "my last project was late because of the software" excuse? Sure, we can credit some of the sniping to the differences between software and hardware engineers, but in the end, the project comes down to two highly skilled, highly motivated teams of engineers committed to making a project a success. The blame for the failure of the project--or more precisely, the failure of the software and hardware to come together in a timely manner--more likely rests on a lack of appropriate tools for the software team to use in an SOC design.

Tools for embedded software development today typically require working hardware before the designers can begin the software development and validation process. Software simulation technologies are feeble when compared with those of hardware simulation. It's true that leading EDA companies have introduced hardware-software coverification environments, moving the software development and validation process forward in the design cycle while providing a much higher level of confidence in the chip design. Emulation provides an even faster means to validate even more of the software application before committing to silicon. But most embedded software companies continue to focus on unrelated issues, such as determining how to download software faster to a target system or developing middleware or vertical applications for bloated RTOSs that have no place in a memory-constrained SOC design anyway.

Despite the increased use of C and C++ for object-oriented software design, designers still build and validate embedded software the way they did in the 1970s: Build a hardware prototype, throw together some code, download it or put it into Flash, and figure out why it doesn't work. Dandy. If the prototype doesn't work, it's just a couple of blue wires here and there. In the SOC world, though, blue wires are very expensive. Prototypes aren't just thrown together; even the act of downloading software and determining why it doesn't work is incredibly complex because the designers can't get to the information they need out of the chip. The traditional embedded software development methodology fails.

Can you blame the embedded software companies for ignoring your SOC needs? Commercial, off-the-shelf RTOSs have become wildly popular, with the market growing at some 35 percent each year. The proliferation of processor architectures and variants keeps the embedded software tool developers busy 24 hours a day trying (somewhat in vain) to keep up. The SOC hails from that arcane hardware world that the software folks never really understand anyway.

So, in this rush to bigger, slower, buggier embedded software and board-focused debugging tools, who has the time to focus on the software development requirements of the SOC developer? The EDA companies, that's who! Software design and validation must begin at the earliest phases of an SOC design project, and EDA and software tools must work very closely together. Embedding memory still costs a bundle, leading to a renewed demand for smaller software footprints. The lack of access to internal signals and buses calls for a new debugging paradigm that gives software tools access to hardware simulation models. Since many of the embedded software tool providers are busy servicing the traditional memory-rich board-based business, it's up to the EDA companies to lead the charge to provide improved software development environments for SOC designers. We must strive to provide EDA tools that converge with embedded software tools.

Michael Kaskowitz is vice president and general manager of the Embedded Software Division of Mentor Graphics Corp. in San Jose. He has 19 years of technology and management experience in the embedded and EDA industries, having served as vice president of engineering at Sensory and as vice president of core architecture and technology at Cadence Design Systems.