Historical perspective
To the Editor:
I have just read "Coding RTL Verilog to Facilitate an Optimum Verification Flow" by Foster and Bening (December 1999, p. 14). The authors' approach is remarkably similar to one I describe in a paper I just submitted to
HDLcon entitled "Subset VHDL for HW/SW Design." I used 42 out of 93 VHDL keywords, of which 40 are common to the programming language ANSI 1815. By using this subset, I can design my own low level-cell components and build up to more complex units for my 'almost zero-cost processor' design. I realize that ASIC designers do not use VHDL. However, being common to an ANSI/ISO standard programming language means that my processor can be designed, simulated, and programmed for safety critical embedded
applications with the same subset on my DOS PC. The design is supported by my compiler, which gives me access to the source code for building my own tools.
The 16-bit processor chip I designed is now a quarter of a century old, and the concepts may be obsolete. The major difference is the asynchronous nature of the processors I have designed in the past. The old processor chip clock speeds up for multiplication, but can also be slowed down to single stepping for debugging purposes, enabling me to find metal breaks
using contrast SEM and enlarged images for close examination and process improvement.
Sy Wong
Designer
Mark V Systems
Encino, CA
On the other hand
To the editor:
Foster and Bening describe a methodology for design and verification. Unfortunately they don't do justice to the Verilog language. The table of keywords for design on page 22 should omit 'initial' and 'casex'. Hardware initialization can't be guaranteed, so 'initial' should only be used in
test benches. The preferred 'case' with wildcards is 'casez' and should be added to the table. There are subtle and important differences in the handling of unknowns. If they are going to put down a list of keywords for design, they should put down a list of keywords for test benches since this is an article on verification. The rules for test benches include using the '===' and '!==' over the '==' and '!=', although the reader is left with the impression that '===' and '!==' should not be used.
James
Lee
Consulting Engineer
Seva/Intrinsix Corp.
Fremont, CA
NT versus Linux
To the editor:
The question of which is better NT or Linux is really mute. The development of a product is driven by cost. The one that works with the least cost including man hours is the winner. Currently we have Linux, HP-UX 10.2, and NT 4.0 running on several systems. The HP-UX is on two dual operation 9000 series units. Speed to me is UNIX, but I'm prejudiced; my vote would not
count.
I have not had the time to try the Linux but have played with the Red Hat version. The Red Hat we are running appears stable, but I reserve judgement until it's been put in harm's way.
Harold Green
Design Engineer
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