Los Angeles is associated with movie stars, endless summer, unending traffic jams - and this year, with DAC (the Design Automation Conference), the largest conference and exposition in the EDA industry. Los Angeles offered an appropriate venue for a show of this magnitude, because a lot of what happens at DAC requires a significant suspension of disbelief. As in the past, the noise and bluster surrounding most of the product announcements made it hard to find the few nuggets of true innovation and value.
The three major thrusts at the show were: verification, system-level design and the accompanying transition to a system-level design language, and the advent of web-enabled EDA tools. All of these announcements possibly portend major changes in the design environment in the next few years.
Truth or consequences
Gary Smith, chief EDA analyst at Dataquest, noted that there are now 74 companies producing IC verification tools. Although few of these companies were introducing completely new tools at DAC, this tool category and its growth indicates an ongoing problem in the area of design verification. As today's designs get larger and more complex, the difficulties in verifying those designs increase as a power of the gate count. Not only do these large designs pose more challenges in terms of the raw numbers of vectors, but the interactions between the large functional blocks change from a bit or vector orientation to a transaction or packet emphasis.
The latest generation of verification tools encompasses a number of technologies simultaneously. A number of tools are basing their success on the concept of semi-formal verification. The application of formal methods in conjunction with some form of design intent extraction enables higher levels of verification automation. The challenge for the tool designers is to deliver on the promise of more intelligent and more automated verification that can, in turn, address a mixture of design types and styles including microprocessors, memories, custom logic, and even mixed-signal components. In the end, faster and more thorough verification - with less effort - is the sought-after goal.
Additionally, the number of companies moving into the hardware-assisted verification area seems to indicate that software-only verification methods are unable to handle the complexities and interactions of the very large designs, or at least can't handle the verification tasks in a reasonable amount of time.
Today, most companies verify the RTL, synthesize to gates, reverify the design, synthesize to final netlist, and finally verify one more time. All of this is just in the design phase of the project and doesn't even include the multiple iterations and verification steps at the CAD and physical design levels. Ideally, companies would like to design and verify once, then have the implementation flow automatically transform and confirm adherence to the initial specifications.
From C to shining C++
One really encouraging development in the IC design space is the acknowledgment that system-level exploration and characterization is crucial to the future of electronic design. Some of the system-level tools can do system profiling and evaluate hardware and software interactions. Both of these functions allow architectural exploration - a facet of the design space that few people have put very much energy into; smaller designs in past years didn't require as much system optimization or evaluation. When a majority of the components are discrete units on a PC board, changing the system architecture only requires changing some parts and possibly changing the board layout - a much easier and much less expensive process than re-designing an integrated circuit.
Times are changing, however. Now, when a single chip may house most of the system components, architecture is no longer a low-cost variable within the design equation. A system-level design tool grants the designer the ability to evaluate various alternatives and structures for the design. This rapid, high-level evaluation enables the investigation of all of the structures and permits analysis of trade-offs and compromises within the design. The new generation of system-level tools creates this type of design-analysis capability. In fact, some of the tools can actually profile preliminary software within various microprocessor environments.
As a part of the system-level evaluation tools, the associated issue is the movement to raise the level of design language abstraction to a higher local language like C or C++. Other system-model design languages include SLDL (system-level definition language) used in communications systems design and Rosetta, a language coming out of work from Sematech. A cynic would say that the drive to change languages is a feeble attempt from the EDA vendors to force changes into the design community and create new markets for tools. An alternate, less-harsh view of things sees the move to a higher level of abstraction as necessary to address the size and complexity of the next-generation designs.
Already, the nascent move to higher level languages is developing a chasm. In one camp, the SystemC group, led by Synopsys, is moving toward a set of class libraries for the standard C++ language. The class libraries define hardware-specific functions and operations and have a special syntax for the time-dependent operations. Already, a fair number of EDA vendors and, surprisingly, some of the ASIC vendors are supporting the C++ language and the associated class libraries. In the other camp, Accellera, created from the union of VHDL International (VI) and the Open Verilog International (OVI), is working to develop its own variant of C for hardware design.
At one of the workshops in Los Angeles, a number of engineers severely discriminated against both of the camps and their attempts to move to even higher levels of language. The engineers said that they would prefer getting robust and usable tools for verification, rather than tools to raise the level of abstraction for the design phase of an IC development, although they admitted the move to a higher level of abstraction might reduce the design entry time and provide greater opportunities for architectural exploration. To further exacerbate the problem, the machine-generated HDL from a C design, would be less intelligible than even the most obscure and convoluted code generated manually. Here's an obvious place for tools that capture the design intent to show that they are made of the right stuff.
The spectacular web
This year, a number of companies presented new models for business. The greatest change was the movement to put EDA tools on the web. At one end of the spectrum, you have the large companies like
Synopsys (Mountain View, CA) and Avanti (Fremont, CA) extending the reach of their service divisions by providing, through a new environment called Design Sphere, access to a separate, dedicated server and a collection of tools for a customer's project. This is the high end of the application service provider (ASP) business and allows user companies to out-source tool integration and network support services for a portion of their design project.
Other companies in the ASP space host either their own or other third-party tools on web-enabled servers, and provide everything from single-function point tools on a pay-per-session basis to complete tool suites for a portion of the design project. Most of the ASP vendors are planning to operate in a pay-per-session basis, where the user logs into the system and accesses tool functions via a web browser. The value to the user is in the elimination of an expensive license and the need to integrate another tool into the design flow. In addition, the user gets to try a new tool in the same way that people evaluate new car - by renting that specific model - and can start the learning process for a new tool without having to integrate that tool into the existing design flow.
Some of the ASPs create a working environment for existing tools. The service providers have to develop technologies that permit access to tool functions through a web browser rather than a standard command line or Windows menu. The challenges for these providers are in creating environments that allow designers to move seamlessly between their normal workspace and their web-enabled workspace, without losing data or breaking down at the firewall. Data integrity and system security are among the issues that need to be addressed to everyone's satisfaction in order for these working environment ASPs to become viable and pervasive.
Other ASPs are creating web-specific tools that exist as native functions in a web environment. These tools are made to operate only with a web browser as the standard interface, eliminating the need to write versions for different operating systems and different GUIs. In some cases the tools are available for use at no charge, but the company charges to download the results. In other cases, the user must pay for all sessions independent of any results. These native web-based tools are likely to become an important part of the design flow, but the companies that make these tools may not exist as independent entities for very long. They may be quickly bought out instead by other EDA companies.
Other capabilities on the web are related to ongoing changes in delivery channels for products and information. A large number of the companies are approaching the web as a low-cost sales channel and delivery mechanism for their tools. A user goes to the company website, looks into a data sheet, and then orders the product. A variant of this model downloads the demo version, tests the tool, and then purchases the software. The vendor then sends out a new software key, which enables full functionality in the tool.
Some companies are also using the web to send information to large classes of users, providing information in the form of application notes or discussion threads about specific topics. This information dispersal is particularly valuable for users who aren't direct buyers of the tool, but have an OEM version embedded within another tool. Now, these OEM users can access support and help for embedded tool functions.
That's a wrap
This year, the many new company and product introductions at DAC were comparable to previous years in terms of total quantity, but this year's announcements suggest larger moves are coming to the design environment. The success of the system-level design tools may depend upon the new verification technologies - even though there are clearly too many verification companies. The emergence of the web as an independent design platform will definitely change the EDA landscape - but like everything else associated with the Internet, in ways that no now can easily predict.
Tets Maniwa is the former Editor of ISD Magazine.
He is now CMPs Community Leader for EDA and site manager for EEdesign.com.
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