Timing Analysis for the PA-8000
			by Clay McDonald, Tom Indermaur, and Mike Buckley HP engineers developed two timing analysis methodologies to optimize the PA-8000 microprocessor.
		Focus Report: Foundries
			by R.T. "Tets" Maniwa The business-cycle of the semiconductor industry changes the relationship between foundries.
		FPGA Design: Early Implications in Partitioning
			by Stephen L. Wasson Partitioning an FPGA design is more involved than simply executing a post-processing step. Often, the original design must be significantly transformed to accommodate dozens of real-world partitioning issues.
		Editorial
			by Jonah McLeod Trends In Deep Submicron Design Tools
		ASIC Issues
			by R.T. "Tets" Maniwa Logic Signals Need New Standards
		Programmable Notes
			by Larry Waller Low-Voltage Programmables: Why They've Lagged, an Why This Is Changing
		Viewpoint
			by Mike Baird How To Learn VHDL or Verilog Today? CBT, That's the Way!
		In The News
		Tools & Technologies