Designing the UltraSPARC-1
			by Shrenik Mehta, Robert Garner, Hemraj Hingarh, Dennis Chen, David Greenhill, and Peter Fu Advanced tools and design methodology were essential, but a major aspect of the design involved tradeoffs and special considerations.
		Designing a 100 kgate Set-Top Box ASIC Using Behavioral Compiler with Verilog
			by David C. Black A first-time user of Synopsys ' Behavioral Compiler describes the development of a high-performance ASIC.
		Focus Report: Formal verification, Cycle-Based Simulation, Timing Analysis, and ESL Entry
			by R.T. "Tets" Maniwa The large designs are breaking the tools, so alternative design tools can scale the simulation problems to a more managable size.
		DAC Special Section: Results of the 1996 USE/DA Survey on EDA Business Practices
			by Steven E. Schulz The deadline pending--blood, sweat, and gallons of Coca-Cola surged through Steve's veins as he cradled his little girl in one arm while typing the results of this survey with the other.
		Arati Prabhakar, DAC's Keynote Speaker
			by R.T. "Tets" Maniwa The DAC keynote speaker talks about the government's role in technology development.
		The State of the Art in IC Layout Migration
			by Jonah McLeod Multiple processes for a design require the ability to migrate the design from process to process.
		Editorial
			by Jonah McLeod Overcoming Obstacles in Designing with Reusable Cores.
		ASIC Issues
			by R. T. "Tets" Maniwa Is a System-on-a-Chip a Good Idea?
		Programmable Notes
			by Larry Waller You Better Plan for Programmable Logic Obsolescence
		Viewpoint
			by Thomas P. Pennino Have You Noticed a Difference in DAC? If Not, Read on...
		In The News
		Tools & Technologies