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Mixed-Signal Modeling for ICs
by Jim Holmes, Felicia James, and Ian Getreu
The challenges of analog and mixed-signal design call for different modeling and simulation technologies
Developing an EDA Vendor-Independent ASIC Design System for VHDL
by Bob Holstine & Greg Haynes
Variations in tools drive the requirements for a reasonable interface to simulation results.
ASIC Multidimentional Design for Test
by Nick Arreguy
Test-related time-to-market delays and loss of market share are often the result of not fully understanding design for test methods.
Focus Report: Logic Synthesis Tools
by Steven E. Schulz
Writing last year's synthesis report while cradling his newborn girl wasn't enough of a challenge for Steve. So this year, Steve--and his wife--added another little girl to the family.
Transitioning from ABEL-HDL to VHDL
by Dennis McCrohan, Mike Holley, & Ryan Linderman
For programmable logic users, the increasing capacities of devices require a change to a new hardware description language.
Logic Synthesis for the Next Generation
by Michael Klein
Chromatic Research examines whether a new logic synthesis tool can handle the growing complexity of its full-custom media processors.
Editorial
by Jonah McLeod
Finding Winners and Losers in the Battle Over IP
Programmable Notes
by Larry Waller
Density increases Spur a User Rush Toward Efficiencies of ISP
Viewpoint
by Al Graf
Programmable Logic Synthesis: Your Competitive Weapon
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