Codesigning a Complex System on a Chip with Behavioral Models
			by Bob Cassagnol, Sandra Weber, Dave Kloper, Sonjai Gupta, Brandon Bautz, and Effat J-Ahmadi Simultanious development of hardware and software required cooperation among the system house's hardware and software engineers, the CAE vendors, and the foundry.
		Physical Verification: Challenges and Problems for New Designs
			by Tets Maniwa Next-generation designs will require changes in design methodologies--and substantial changes to the tools themselves.
		Focus Report: IC Physical Design Tools
			by Gil Bassak Floorplanners are being linked to place-and-route tools. In the offing: much greater integration of the front and back ends of the design flow.
		EDA Platform Benchmark: Simulation and Synthesis at the Same Time
			by James Lee and Bob Peterson Dual-process benchmarks justify Sun's preeminent position in the EDA world, but speedy PC hardware could make up for some of the deficiencies of Windows NT.
		Editorial
			by Jonah McLeod Coming to Grips with Using Reusable IP
		Viewpoint
			by David P. Lautzenheiser Rapid Time to Production and ASICs Aren't Mutually Exclusive
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