Memory Hierarchies & the Speed Gap
			by Steve Goldstein A workstation's cache memory subsystem design can restrain or speed up system performance.
		Electronic Component
			by Tom Jeffery The Pinnacles Group creates a new standard for electronic data books.
		Focus Report: Cores and Megacells
		Reconstruction, Maintenance, and Archival of FPGAs
			by Shay Wasser and Moshik Antebi The trials and tribulations of modifying FPGAs when no documentation is available.
		Editorial
			by Jonah McLeod Can the Gate Array Market Be Saved?
		EDA Platform
			by Steve Schulz A New HDL Environment
		Viewpoint
			by Joseph B. Costello An Open Letter to the Electronics Industry
		In The News
		Feedback
		Tools & Technologies