Designing Polyphase DPD Solutions with 28-nm FPGAs

This white paper describes how to design an efficient polyphase and non-polyphase digital predistortion (DPD) feed-forward path solution with Altera 28-nm FPGAs, especially the Arria V family of FPGAs. In addition, a resource usage and power comparison between different architectures is provided to facilitate design tradeoffs. The ever-increasing use of smart phones and devices is driving exponential growth in mobile data traffic. Because the current mobile infrastructure cannot keep pace with the growing demand, basestation providers need to upgrade their digital front end (DFE) radio equipment to support wider and wider RF bandwidths.