Education & Training

Technical Papers Spotlight

Open Standards and Product Differentiation

System-Level and Application Specific ESD Protection Guide

Dangers of Aftermarket Counterfeit Battery Packs

Leveraging ADC Technology to Capture, Compute, and Communicate in Microcontroller-Based Embedded Systems

Addressing the Complexity of "Smart" Devices Through Low Power Hierarchical Design

Accelerating, Analyzing, and Securing Network Traffic

Build, Borrow, Buy: New Approaches to Addressing Software Complexity

Integrated ZigBee Radio Implementation and Testing

Fundamentals of a Mixed Domain Oscilloscope

Coherent Optical Signal Generation with High-Performance AWG

Radar Processing: FPGAs or GPUs?

High Performance Embedded Computing and Its Impact on Mil/Aero Applications

Improve Quality and Decrease Time to Market with Better Requirements Management

Why Honest Weigh Scales Are Application Specific

Protecting People, Data, and Revenue with Security-Optimized Embedded Designs: Part 2

Linux System/User Space Virtualization for Next Generation Real-time Embedded Applications

Designing High-Efficiency LED Driver Circuits Using the NCL30051

Enhanced, High-Efficiency Power Factor Controller

Using Plots for HDL Debugging as a Powerful Alternative to Traditional Waveforms

Merging High-Performance Instruments and FPGAs for Best-in-Class WLAN Measurements

Technical Papers

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Tech Paper Title	Type	Date
Radar Processing: FPGAs or GPUs? Altera	White Paper	4/1/2013
Low-Cost Implementation of High-Performance PCIe Gen2 Hard IP Altera	White Paper	3/7/2013
A Tailored Approach to FPGA Process Selection Altera	White Paper	2/25/2013
Overcoming Smart Grid Equipment Design Challenges with FPGAs Altera	White Paper	2/7/2013
An Independent Evaluation of Floating-Point DSP Energy Efficiency on Altera 28 nm FPGAs Altera, Berkeley Design Technology	Case Study	2/1/2013
Implementing Efficient Low-Power PCIe Interfaces with Low-Cost FPGAs Altera	White Paper	2/1/2013
Real-Time Challenges and Opportunities in SoCs Altera	White Paper	1/1/2013
Delivering the Right Power and Performance for 28 nm High-End FPGAs Altera	White Paper	12/2/2012
Increasing Efficiency with Hard Memory Controllers in Low-Cost 28 nm FPGAs Altera	White Paper	11/1/2012
Support All Industrial Ethernet Standards on Your Next "Drive" Design Altera	White Paper	11/1/2012
Analysis of Floating-point DSP Design Flow and Performance on Altera 28-nm FPGAs (Japanese version) Altera, Berkeley Design Technology	Case Study	10/26/2012
Analysis of Floating-point DSP Design Flow and Performance on Altera 28-nm FPGAs Altera, Berkeley Design Technology	Case Study	10/26/2012
Extending Silicon Convergence with Technology Innovations at 20 nm Altera	White Paper	9/1/2012
Implementing Digital Processing for Automotive Radar Using SoC FPGAs Altera	White Paper	9/1/2012
Reducing Development Time for Advanced Medical Endoscopy Systems with an FPGA-Based Approach Altera	White Paper	8/1/2012

1 - 15 of 229 > Next 15

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All papers are reviewed by EE Times staff. If approved for posting, we'll send you a link as to where the paper can be found on the site. All papers must be technical in nature; Press releases, Product announcements, PowerPoint presentations, pamphlets, incomplete documents/abstracts will not be accepted. For more information, contact Emily Soucy.