Education & Training

Technical Papers Spotlight

Open Standards and Product Differentiation

System-Level and Application Specific ESD Protection Guide

Dangers of Aftermarket Counterfeit Battery Packs

Leveraging ADC Technology to Capture, Compute, and Communicate in Microcontroller-Based Embedded Systems

Addressing the Complexity of "Smart" Devices Through Low Power Hierarchical Design

Accelerating, Analyzing, and Securing Network Traffic

Build, Borrow, Buy: New Approaches to Addressing Software Complexity

Integrated ZigBee Radio Implementation and Testing

Fundamentals of a Mixed Domain Oscilloscope

Coherent Optical Signal Generation with High-Performance AWG

Radar Processing: FPGAs or GPUs?

High Performance Embedded Computing and Its Impact on Mil/Aero Applications

Improve Quality and Decrease Time to Market with Better Requirements Management

Why Honest Weigh Scales Are Application Specific

Protecting People, Data, and Revenue with Security-Optimized Embedded Designs: Part 2

Linux System/User Space Virtualization for Next Generation Real-time Embedded Applications

Designing High-Efficiency LED Driver Circuits Using the NCL30051

Enhanced, High-Efficiency Power Factor Controller

Using Plots for HDL Debugging as a Powerful Alternative to Traditional Waveforms

Merging High-Performance Instruments and FPGAs for Best-in-Class WLAN Measurements

Technical Papers

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Tech Paper Title	Type	Date
Preventing Structural Faults in Design: Clock and Resets Freescale Semiconductor	White Paper	2/28/2013
Preventing Structural Faults in Design: Data Path Freescale Semiconductor	White Paper	2/26/2013
Cost Effective Approach to System Level High Speed Signal Integrity Analysis Freescale Semiconductor	White Paper	2/22/2013
Hierarchy Independent Physical Data Handshake between Design and Packaging Freescale Semiconductor	White Paper	1/9/2013
A Novel Liberty based Approach for Early Power Estimation for Technology Nodes Freescale Semiconductor	White Paper	1/2/2013
Challenges in Using Linux for CPU intensive real time networking products Freescale Semiconductor	White Paper	11/20/2012
Smart Power Hook-up Methodology for Memories on SoC Freescale Semiconductor	White Paper	10/22/2012
Early Stage Decap Estimation for SoCs Freescale Semiconductor	White Paper	10/15/2012
"Real" System Verilog Testbench for Mixed Signal Design Verification Freescale Semiconductor	White Paper	10/11/2012
An automated method to generate isolation values in Low power design Freescale Semiconductor	White Paper	8/31/2012
Leakage Optimized Decap Addition Methodology Freescale Semiconductor	White Paper	8/10/2012
Master Stimulus--Eliminating the Need to Recompile the Testbench for Different Scenarios Freescale Semiconductor	White Paper	8/8/2012
Enabling Die Design Compatibility for Wirebond and Flip-Chip Packages Freescale Semiconductor	White Paper	7/31/2012
Getting a processor 'Design Win' Freescale Semiconductor	White Paper	7/24/2012
A smart integrated switch cell for well bias low power architecture Freescale Semiconductor	Technology Paper	7/18/2012

1 - 15 of 100 > Next 15

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All papers are reviewed by EE Times staff. If approved for posting, we'll send you a link as to where the paper can be found on the site. All papers must be technical in nature; Press releases, Product announcements, PowerPoint presentations, pamphlets, incomplete documents/abstracts will not be accepted. For more information, contact Emily Soucy.