EDA/IP Weekly Roundup – August 8th

8/8/2012 9:23 AM EDT

This is a roundup of news or activities in the past few days that may be of interest to people.

Synopsys is collaborating with Renesas Electronics Corporation to develop and deploy advanced software development solutions optimized for designs based on Renesas microcontrollers (MCUs), including the recently announced RH850 family. The collaboration includes establishment of a Virtual MCU Center of Excellence with a dedicated team of engineers from both companies that will develop, among other commercial products, system-level models and Virtualizer Development Kits (VDKs) to accelerate software development and system testing for Renesas RH850-based designs.  VDKs are software development tools integrating functional models of digital hardware, providing full visibility and controllability of single and multicore systems for software debug and analysis capabilities.

TSMC has joined ASML’s Customer Co-Investment Program for innovation, committing to invest EUR 276 million in research and development of next generation lithography technologies, which include Extreme Ultraviolet (EUV) lithography technology and 450-millimeter lithography tools, over the next five years as well as EUR 838 million in a 5 percent ASML equity stake. The objective of the Co-Investment Program, which was announced on July 9, 2012, is to accelerate ASML’s development of EUV technology beyond this current generation and ASML’s development of future 450 mm silicon wafer technology, both due in the second half of this decade.

ARM has launched the second generation of the ARM®Mali™-T600 Series graphics processing units (GPUs). Each of the products includes Adaptive Scalable Texture Compression (ASTC), a texture compression technique that originated from ARM. ASTC significantly optimizes GPU performance and increases battery life in devices, enabling an always-on, always-connected experience, and has now been adopted by the Khronos™ Group, an important industry consortium that focuses on open standards. Based on the Mali Midgard architecture, the second generation of the Mali-T600 Series comprises three GPUs - the Mali-T624, Mali-T628 and Mali-T678. The Mali-T624 and Mali-T628 provide graphics and GPU compute to smartphones and smart-TVs, while the Mali-T678 has been optimized to address the tablet market.

Kilopass Technology has expanded enablement of its XPM (eXtra Permanent Memory) NVM IP on the Dongbu HiTek AN180 and BD180 BCD (Bipolar-CMOS-DMOS) processes.  Kilopass has also begun enablement of its XPM solutions at additional 180nm BCD foundries. Power management designs targeting mobile devices, hard drives, and the wide range of electronic systems being designed into automobiles, smart cities, and homes are driving increased demand for JEDEC-qualified Kilopass embedded NVM IP to store analog trim, product configuration data, and code storage in BCD process technology.

ASSET InterTech has added two new memory test instruments to its ScanWorks embedded instrumentation library for its FPGA-controlled test (FCT) circuit board test tool. The new instruments, which ScanWorks FCT can temporarily or permanently embed in an FPGA include a DDR2/DDR3 memory link test instrument and a generic memory tester. This tester-in-a-chip can be employed during design to accelerate the board bring-up process by validating early prototypes before firmware and software are available, during manufacturing to ensure the quality of assembled boards and later as a troubleshooting tool in field service. After it has been used, the ScanWorks FCT tester can be removed and the FPGA’s functional firmware loaded.

Over the past three months, Mentor Graphics has added and improved support for 42 embedded development boards for the Nucleus® RTOS, Mentor® Embedded Linux®, and Sourcery™ Codebench embedded development products. Expanded support for MIPS, SuperH, and ARM-based architectures include the following vendors: Atmel, Freescale, Logic PD, MIPS, Mistral, Renesas, STMicroelectronics and Texas Instruments.

Synopsys has launched VIP-Central.org, a technical community site focused on system-on-chip (SoC) verification engineers and users of verification IP (VIP). The site provides a centralized online resource of relevant forums and blogs focused on verification of industry-standard protocols. VIP-Central.org is the go-to source for the latest technical information and discussions on the use of verification IP and advanced verification methodologies to verify protocol-based IP as well as IP integration, SoC sub-systems and full SoCs. VIP-Central.org aggregates information from industry experts across the verification community, providing best practices and ideas for better verification performance, protocol debug, methodology, verification planning, coverage management and ease-of-use.