I think I will call today – on-chip instrumentation day. Not only did I place an article on EDN today “Is there a market for on-chip instrumentation?
” on that very subject, but I also received two press releases on the subject. In this blog I will talk about one of them. It came to me from ASSET® InterTech who has a new introductory tutorial about the new IEEE P1687 Internal JTAG (IJTAG) standard that simplifies and automates the way chip designers manage embedded instruments.
The IJTAG standard, which is expected to be voted on later this year specifies a standard interface to instruments embedded in chips, and defines a methodology for accessing them, automating their operations and analyzing their outputs. To allow for a wide variety of functionality, an instrument’s core intellectual property (IP) does not need to conform to the IJTAG standard, only the interface to the on-chip IJTAG network. With standardized embedded instrumentation, chip designers are better able to manage the hundreds or thousands of instruments that are typically embedded in complex components and systems-on-chip (SoC). The standard defines an architecture that can automatically connect all IJTAG instruments as well as an access methodology for automating their operations.
ASSET’s IJTAG Tutorial describes the on-chip IJTAG architecture as well as the two languages defined by the standard, Instrument Connectivity Language (ICL) and Procedural Description Language (PDL). ICL defines the connections among embedded on-chip instruments and PDL is an extension of the popular Tcl (Tool Command Language) for developing validation, test and debug vectors for execution by IJTAG instruments.
The tutorial can be downloaded directly from the ASSET web site
While I haven’t read it in detail yet, it is very high level in nature and will not teach you about the standard itself, rather it will show you what the standard is for and how it operates in conjunction with other existing standards. It is free and requires very little information in order to get a copy of the 9 page tutorial.Brian Bailey
– keeping you covered
If you found this article to be of interest, visit EDA Designline
you will find the latest and greatest design, technology, product, and news articles with regard to all aspects of Electronic Design
Also, you can obtain a highlights update delivered directly to your inbox by signing up for the EDA Designline weekly newsletter –
just Click Here
to request this newsletter using the Manage Newsletters tab (if you aren't already a
member you'll be asked to register, but it's free and painless so don't let that stop you).