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Best of the web – August 24th
Brian Bailey
8/24/2012 10:27 AM EDT
This weekly posting provides a condensation of some of the best EDA and IP blogs from the web over the past week. If you have a blog feed that you would like me to consider, please let me know and I will include it in future editions.
This week’s winner is:
ROM code first – Aachin Nohl tells us about boot monitors and virtual prototypes
Other good blogs, papers and articles include:
Q&A: Cadence VP Martin Lund Brings User Perspective to Semiconductor IP – Richard Goering
What Your SoC Designer Might Not Tell You About Power Management – Ron Wilson
Where’s the Best Place to Put a Radiator in a Room? Part 5: Get a Job – Robin Bornoff prepares you for an interview question.
The $10,000 ASIC – JL Gray started asking this question at DAC and is still looking for input.
Keynote: New Memory Technologies Challenge NAND Flash and DRAM – Richard Goering
Designer View – Low-Power IC Design Challenges and Solutions – Richard Goering talks about Marvell’s approach to low power.
Verification challenges require surgical precision – Pranav Ashar
What the Sourcerers do to help people make good use of OSS tools for embedded systems – Kamran Shah
Brian Bailey – keeping you covered
If you found this article to be of interest, visit EDA Designline where you will find the latest and greatest design, technology, product, and news articles with regard to all aspects of Electronic Design Automation (EDA).
Also, you can obtain a highlights update delivered directly to your inbox by signing up for the EDA Designline weekly newsletter – just Click Here to request this newsletter using the Manage Newsletters tab (if you aren't already a member you'll be asked to register, but it's free and painless so don't let that stop you).
This week’s winner is:
ROM code first – Aachin Nohl tells us about boot monitors and virtual prototypes
Other good blogs, papers and articles include:
Q&A: Cadence VP Martin Lund Brings User Perspective to Semiconductor IP – Richard Goering
What Your SoC Designer Might Not Tell You About Power Management – Ron Wilson
Where’s the Best Place to Put a Radiator in a Room? Part 5: Get a Job – Robin Bornoff prepares you for an interview question.
The $10,000 ASIC – JL Gray started asking this question at DAC and is still looking for input.
Keynote: New Memory Technologies Challenge NAND Flash and DRAM – Richard Goering
Designer View – Low-Power IC Design Challenges and Solutions – Richard Goering talks about Marvell’s approach to low power.
Verification challenges require surgical precision – Pranav Ashar
What the Sourcerers do to help people make good use of OSS tools for embedded systems – Kamran Shah
Brian Bailey – keeping you covered
If you found this article to be of interest, visit EDA Designline where you will find the latest and greatest design, technology, product, and news articles with regard to all aspects of Electronic Design Automation (EDA).
Also, you can obtain a highlights update delivered directly to your inbox by signing up for the EDA Designline weekly newsletter – just Click Here to request this newsletter using the Manage Newsletters tab (if you aren't already a member you'll be asked to register, but it's free and painless so don't let that stop you).
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