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EDA/IP Weekly Roundup – September 12th
Brian Bailey
9/12/2012 11:34 AM EDT
This is a roundup of news or activities in the past few days that may be of interest to people.
Xilinx and Barco Silex, have announced a collaboration to ease the development of video over IP solutions with a platform combining hardware-validated IP, reference designs and systems integration services supporting Xilinx's All Programmable FPGAs and SoCs. The new initiative will enable broadcast equipment OEMs to accelerate product development and add the latest video over IP capabilities to their existing products and those currently in development.
Also Xilinx and OmniTek, launched a real-time video processing platform. Powered by Xilinx 's ARM®-based Zynq™-7000 All Programmable SoC, the OmniTek Zynq-7000 SoC Broadcast Development Kit presents an opportunity for broadcast OEMs to combine their own hardware and software IP with this reprogrammable video processing platform for creating unique and differentiated broadcast equipment that can easily adapt to changing standards.
Not to be outdone, Altera announced a system development kit capable of handling “beyond HD” resolutions and formats for customers designing multi-channel and high-resolution video processing systems. As broadcast customers adopt IT servers and technologies to lower costs, designers must build optimized products while still meeting the performance requirements of high-resolution, dense-channel video applications. Altera’s Advanced Systems Development Kit supports a complete BSP (board support package) with firmware and PCI Express® (PCIe®) streaming drivers. It is also PCIe form-factor compliant, enabling customers to deploy it in both commercial off-the-shelf (COTS) and purpose-built servers.
United Microelectronics Corporation ( UMC) has announced a collaborative effort with STMicroelectronics for 65nm CMOS image sensor technology using backside illumination (BSI). The partnership follows upon the two companies’ success to manufacture ST's front-side illumination (FSI) processes at UMC’s 300mm Fab 12i in Singapore. The 1.1um pixel BSI process, which will also be developed at Fab12i, will be available as an open platform for customers to power future smartphone generations that require high resolution and picture quality (>10MP).
Breker Verification Systems is on the move and growing its Silicon Valley presence with a new location in San Jose. The office at 1879 Lundy Ave. will accommodate its expanding engineering and customer support teams. The company's headquarters remain in Mountain View, Calif., with the main number being (650) 336-8872.
ASML has announced that it has received the approval by the Extraordinary General Meeting of shareholders (EGM) of its Customer Co-Investment Program and that the US anti-trust clearance process is complete. The three program participants, Intel, TSMC and Samsung Electronics, have agreed to contribute EUR 1.38 billion to ASML’s research and development of next-generation lithography technologies over five years.
Aselta, a supplier of advanced dataprep software solution, and NuFlare Technology, Inc., a world leader in electron beam mask writing systems, have announced a partnership to streamline the dataflow between Aselta dataprep software solution and the NuFlare EBM-8000 mask writing system. A new Aselta module will generate and optimize the mask data for the recently available external control of dose modulation in NuFlare machines. This capability is enabled through NuFlare new VSB12i input format which Aselta now supports. Aselta supports as well NuFlare VSB12 input format, previously available.
ASSET InterTech and Teradyne have extended the integration of the JTAG and boundary-scan test capabilities of ASSET's ScanWorks platform for embedded instruments into Teradyne's PXI Express-based High Speed Subsystem (HSSub). As a result of the integration, the ScanWorks boundary-scan and JTAG tools are able to test a circuit board through the high-speed communications channels on a Teradyne instrument. These channels connect ScanWorks to the boundary-scan Test Access Port on the circuit board that's being tested.
Oski Technology is celebrating success after beating the 72-hour clock in the Oski Live Verification Challenge held during this year’s Design Automation Conference (DAC) in June. The Oski team received a register transfer level (RTL) design it hadn’t seen before from NVIDIA at 5 p.m. Sunday, June 3, hours before DAC officially began, and built an end-to-end formal testbench in less than 72 hours. The NVIDIA team received detailed verification results delivered at 5 p.m. Wednesday, June 6, including the end-to-end formal testbench, and four formerly undetected corner-case bugs.
Carbon Design Systems has announced that it received $4 million in investment funding from Samsung Venture Investment Corporation. Additionally, the companies have entered into a strategic partnership. Funds from the strategic investment will be used as working capital and support Carbon's ongoing development of leading tools in the electronic system level (ESL) design space, including its fast, accurate virtual prototypes. Carbon currently offers the industry’s only unified virtual prototype that scales from 100% accuracy to hundreds of MIPS performance. Initiatives will be undertaken to expand the reach of Carbon’s fast, accurate virtual prototypes.
X-FAB Silicon Foundries has announced an open-platform MEMS 3D inertial sensor process. This will enable fabless and other companies to apply their own design or use X-FAB’s design partner, and immediately run wafer volumes without long and costly process development. The new MEMS technology is suitable for a wide range of applications such as mobile devices, consumer goods, games and toys, automotive, robotics, industrial and medical equipment that use 3D accelerometers or gyroscopes. One-axis and 2-axis designs can be produced with the same process. Accelerometer and gyroscope designs also can be placed side by side on a single chip made with the same process, enabling the manufacture of 6DoF IMU.
CEVA has made a minority equity investment in Antcor, a provider of software-based intellectual property for Wi-Fi in handsets, machine-to-machine (M2M), and small cells. Under the equity investment agreement, Antcor is focusing the development of its Wi-Fi 802.11ac software around the CEVA-XC™ DSP architecture framework, enabling CEVA customers to license a complete and optimized software-based Wi-Fi solution. Antcor’s software IP primarily targets use cases where Wi-Fi radio is utilized alongside other air interfaces such as LTE-Advanced, HSPA+, TV broadcasting, Bluetooth, GNSS and smart home networks.
Mentor Graphics has announced that the Calibre® LFD™ (Litho Friendly Design) signoff lithography checking tool has been certified by TSMC for its 20nm IC manufacturing process. The Calibre LFD product identifies hotspots and verifies that designs have sufficient process window. Using the tool, problem features that cannot be fixed at the mask stage using optical proximity correction (OPC) can be identified in the design phase and eliminated before tapeout. This helps to avoid litho-related manufacturing issues and late stage delays resulting from re-design.
Brian Bailey – keeping you covered
If you found this article to be of interest, visit EDA Designline where you will find the latest and greatest design, technology, product, and news articles with regard to all aspects of Electronic Design Automation (EDA).
Also, you can obtain a highlights update delivered directly to your inbox by signing up for the EDA Designline weekly newsletter – just Click Here to request this newsletter using the Manage Newsletters tab (if you aren't already a member you'll be asked to register, but it's free and painless so don't let that stop you).
Xilinx and Barco Silex, have announced a collaboration to ease the development of video over IP solutions with a platform combining hardware-validated IP, reference designs and systems integration services supporting Xilinx's All Programmable FPGAs and SoCs. The new initiative will enable broadcast equipment OEMs to accelerate product development and add the latest video over IP capabilities to their existing products and those currently in development.
Also Xilinx and OmniTek, launched a real-time video processing platform. Powered by Xilinx 's ARM®-based Zynq™-7000 All Programmable SoC, the OmniTek Zynq-7000 SoC Broadcast Development Kit presents an opportunity for broadcast OEMs to combine their own hardware and software IP with this reprogrammable video processing platform for creating unique and differentiated broadcast equipment that can easily adapt to changing standards.
Not to be outdone, Altera announced a system development kit capable of handling “beyond HD” resolutions and formats for customers designing multi-channel and high-resolution video processing systems. As broadcast customers adopt IT servers and technologies to lower costs, designers must build optimized products while still meeting the performance requirements of high-resolution, dense-channel video applications. Altera’s Advanced Systems Development Kit supports a complete BSP (board support package) with firmware and PCI Express® (PCIe®) streaming drivers. It is also PCIe form-factor compliant, enabling customers to deploy it in both commercial off-the-shelf (COTS) and purpose-built servers.
United Microelectronics Corporation ( UMC) has announced a collaborative effort with STMicroelectronics for 65nm CMOS image sensor technology using backside illumination (BSI). The partnership follows upon the two companies’ success to manufacture ST's front-side illumination (FSI) processes at UMC’s 300mm Fab 12i in Singapore. The 1.1um pixel BSI process, which will also be developed at Fab12i, will be available as an open platform for customers to power future smartphone generations that require high resolution and picture quality (>10MP).
Breker Verification Systems is on the move and growing its Silicon Valley presence with a new location in San Jose. The office at 1879 Lundy Ave. will accommodate its expanding engineering and customer support teams. The company's headquarters remain in Mountain View, Calif., with the main number being (650) 336-8872.
ASML has announced that it has received the approval by the Extraordinary General Meeting of shareholders (EGM) of its Customer Co-Investment Program and that the US anti-trust clearance process is complete. The three program participants, Intel, TSMC and Samsung Electronics, have agreed to contribute EUR 1.38 billion to ASML’s research and development of next-generation lithography technologies over five years.
Aselta, a supplier of advanced dataprep software solution, and NuFlare Technology, Inc., a world leader in electron beam mask writing systems, have announced a partnership to streamline the dataflow between Aselta dataprep software solution and the NuFlare EBM-8000 mask writing system. A new Aselta module will generate and optimize the mask data for the recently available external control of dose modulation in NuFlare machines. This capability is enabled through NuFlare new VSB12i input format which Aselta now supports. Aselta supports as well NuFlare VSB12 input format, previously available.
ASSET InterTech and Teradyne have extended the integration of the JTAG and boundary-scan test capabilities of ASSET's ScanWorks platform for embedded instruments into Teradyne's PXI Express-based High Speed Subsystem (HSSub). As a result of the integration, the ScanWorks boundary-scan and JTAG tools are able to test a circuit board through the high-speed communications channels on a Teradyne instrument. These channels connect ScanWorks to the boundary-scan Test Access Port on the circuit board that's being tested.
Oski Technology is celebrating success after beating the 72-hour clock in the Oski Live Verification Challenge held during this year’s Design Automation Conference (DAC) in June. The Oski team received a register transfer level (RTL) design it hadn’t seen before from NVIDIA at 5 p.m. Sunday, June 3, hours before DAC officially began, and built an end-to-end formal testbench in less than 72 hours. The NVIDIA team received detailed verification results delivered at 5 p.m. Wednesday, June 6, including the end-to-end formal testbench, and four formerly undetected corner-case bugs.
Carbon Design Systems has announced that it received $4 million in investment funding from Samsung Venture Investment Corporation. Additionally, the companies have entered into a strategic partnership. Funds from the strategic investment will be used as working capital and support Carbon's ongoing development of leading tools in the electronic system level (ESL) design space, including its fast, accurate virtual prototypes. Carbon currently offers the industry’s only unified virtual prototype that scales from 100% accuracy to hundreds of MIPS performance. Initiatives will be undertaken to expand the reach of Carbon’s fast, accurate virtual prototypes.
X-FAB Silicon Foundries has announced an open-platform MEMS 3D inertial sensor process. This will enable fabless and other companies to apply their own design or use X-FAB’s design partner, and immediately run wafer volumes without long and costly process development. The new MEMS technology is suitable for a wide range of applications such as mobile devices, consumer goods, games and toys, automotive, robotics, industrial and medical equipment that use 3D accelerometers or gyroscopes. One-axis and 2-axis designs can be produced with the same process. Accelerometer and gyroscope designs also can be placed side by side on a single chip made with the same process, enabling the manufacture of 6DoF IMU.
CEVA has made a minority equity investment in Antcor, a provider of software-based intellectual property for Wi-Fi in handsets, machine-to-machine (M2M), and small cells. Under the equity investment agreement, Antcor is focusing the development of its Wi-Fi 802.11ac software around the CEVA-XC™ DSP architecture framework, enabling CEVA customers to license a complete and optimized software-based Wi-Fi solution. Antcor’s software IP primarily targets use cases where Wi-Fi radio is utilized alongside other air interfaces such as LTE-Advanced, HSPA+, TV broadcasting, Bluetooth, GNSS and smart home networks.
Mentor Graphics has announced that the Calibre® LFD™ (Litho Friendly Design) signoff lithography checking tool has been certified by TSMC for its 20nm IC manufacturing process. The Calibre LFD product identifies hotspots and verifies that designs have sufficient process window. Using the tool, problem features that cannot be fixed at the mask stage using optical proximity correction (OPC) can be identified in the design phase and eliminated before tapeout. This helps to avoid litho-related manufacturing issues and late stage delays resulting from re-design.
Brian Bailey – keeping you covered
If you found this article to be of interest, visit EDA Designline where you will find the latest and greatest design, technology, product, and news articles with regard to all aspects of Electronic Design Automation (EDA).
Also, you can obtain a highlights update delivered directly to your inbox by signing up for the EDA Designline weekly newsletter – just Click Here to request this newsletter using the Manage Newsletters tab (if you aren't already a member you'll be asked to register, but it's free and painless so don't let that stop you).
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