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Chip integration: solving duplicate name conflicts during file merging
Yijun Tong – Mentor Graphics
11/15/2012 5:42 PM EST
examining smartdiff
To understand the ability of these new automated file merging techniques, let’s take a closer look at one specific option available in the Calibre DESIGNrev filemerge process—–smartdiff. By default, the Calibre DESIGNrev filemerge process compares cells by name alone. Using –smartdiff, the design team instructs the Calibre DESIGNrev tool to compare the contents of cells with identical names. With –smartdiff, once a name conflict is discovered, the filemerge process performs an XOR on the cell contents of the cells with a name conflict. If the name, contents, and properties match, the cell in the incoming file is ignored. If the names match, but the contents or properties differ, the cell in the incoming file is given whatever treatment is specified by the “blind” merge modes -append|-overwrite|-rename|-force-rename.
Figure 3 shows the same example from Figure 1 after running a Calibre DESIGNrev filemerge with –smartdiff and post-processing option –topcell to clean up the result. Cell E is left as is, since it was already updated. Placeholder Cells F and G are replaced by the updated IP library cells. The IP library Cell C was renamed to C_WB1 before being added to the layout, because by using –smartdiff, Calibre DESIGNrev recognized that the IP library cell C and the layout Block C were not the same, so it then performed a rename as instructed by the –rename merge mode.
Summary
New automated EDA tool capabilities are emerging to help design teams handle complicated file design tasks, such as selectively updating library cells, or merging block and full chip layouts. Sophisticated file merging processes can now be initiated using chip finishing platforms, reducing time to market, ensuring accuracy, and eliminating worrisome and tedious manual processes. As we continue our march down the nanometer road, EDA support for these complex activities is crucial to ensuring our forward momentum.
About the author
Yijun
Tong is a Technical Marketing Engineer with Mentor Graphics, focusing
on Interactive and Integration Technology for the Calibre product line
in the Design to Silicon division. Prior to joining Mentor Graphics,
Yijun worked for Intel Corporation. He received his B. Sc. in Electrical
Engineering from Fudan University in Shanghai, China, and a M.Sc. in
Information Systems Management from Carnegie Mellon University in
Pittsburgh, PA. Yijun can be reached at yijun_tong@mentor.com.
If you found this article to be of interest, visit EDA Designline where you will find the latest and greatest design, technology, product, and news articles with regard to all aspects of Electronic Design Automation (EDA).
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To understand the ability of these new automated file merging techniques, let’s take a closer look at one specific option available in the Calibre DESIGNrev filemerge process—–smartdiff. By default, the Calibre DESIGNrev filemerge process compares cells by name alone. Using –smartdiff, the design team instructs the Calibre DESIGNrev tool to compare the contents of cells with identical names. With –smartdiff, once a name conflict is discovered, the filemerge process performs an XOR on the cell contents of the cells with a name conflict. If the name, contents, and properties match, the cell in the incoming file is ignored. If the names match, but the contents or properties differ, the cell in the incoming file is given whatever treatment is specified by the “blind” merge modes -append|-overwrite|-rename|-force-rename.
> calibredrv –a layout filemerge –smartdiff \
-in my_design.gds –in block.gds
-out my_design_with_block.gds –rename
Figure 3 shows the same example from Figure 1 after running a Calibre DESIGNrev filemerge with –smartdiff and post-processing option –topcell to clean up the result. Cell E is left as is, since it was already updated. Placeholder Cells F and G are replaced by the updated IP library cells. The IP library Cell C was renamed to C_WB1 before being added to the layout, because by using –smartdiff, Calibre DESIGNrev recognized that the IP library cell C and the layout Block C were not the same, so it then performed a rename as instructed by the –rename merge mode.
Figure 3. After running the filemerge process with –smartdiff, the layout file has been updated with the new IP cells as necessary.
Even in the case where the cell renaming requirements are simple, –smartdiff can make the output file more compact, with less redundant data.Summary
New automated EDA tool capabilities are emerging to help design teams handle complicated file design tasks, such as selectively updating library cells, or merging block and full chip layouts. Sophisticated file merging processes can now be initiated using chip finishing platforms, reducing time to market, ensuring accuracy, and eliminating worrisome and tedious manual processes. As we continue our march down the nanometer road, EDA support for these complex activities is crucial to ensuring our forward momentum.
About the author
Yijun
Tong is a Technical Marketing Engineer with Mentor Graphics, focusing
on Interactive and Integration Technology for the Calibre product line
in the Design to Silicon division. Prior to joining Mentor Graphics,
Yijun worked for Intel Corporation. He received his B. Sc. in Electrical
Engineering from Fudan University in Shanghai, China, and a M.Sc. in
Information Systems Management from Carnegie Mellon University in
Pittsburgh, PA. Yijun can be reached at yijun_tong@mentor.com. If you found this article to be of interest, visit EDA Designline where you will find the latest and greatest design, technology, product, and news articles with regard to all aspects of Electronic Design Automation (EDA).
Also, you can obtain a highlights update delivered directly to your inbox by signing up for the EDA Designline weekly newsletter – just Click Here to request this newsletter using the Manage Newsletters tab (if you aren't already a member you'll be asked to register, but it's free and painless so don't let that stop you).
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