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Synthesis no longer the killer app
Brian Bailey
12/4/2012 9:46 PM EST
Synthesis was the killer app in the transition to the RTL design paradigm. It provided a significant increase in design productivity and provided a level of abstraction that was highly suited to standardization and interoperability. When it became clear that a new level of abstraction had become necessary, everyone expected that it would again be synthesis that would be the killer app, but as so often happens – they were wrong. History never really repeats itself. This time it is not the design flow that is the bottleneck in the process, but has been supplanted by two other areas whose needs are much more dire, namely verification and software.
Both of these application areas are helped by a single application – the virtual prototype. But why is design no longer the bottleneck. Simply because the majority of the area on a chip is being taken up by IP or reuse. While there is still a significant number of gates that have to be designed, the system architecture and the integration of all of the pieces has become a much more complex task than it was, and simulation at the RT level just doesn’t have the ability to solve the problem. Abstraction has become an absolute necessity for verification just so that simulation runs can execute for much longer spans of real time and in doing so activate logic that is embedded deep down in the chip.
But software has also risen to become one of the biggest expense areas of systems. Without software a chip is well – just a chip. Software used to be developed on prototype chips or systems, but this is way too late in the development cycle these days. Not only do they have to be done in parallel, but software needs to be able to influence the hardware design and specification. This is where companies can now differentiate themselves. In addition, software has become a lot more difficult with multiple heterogeneous processors and debug is just not possible on real systems in many cases.
That is all a lead up to tell you about a fundamentals course I completed recently on the subject of virtual prototypes and with a particular focus on its application to the embedded software folks. The course covers the value provided by these prototypes, where models come from and how they can be used to develop code for things such as the AM big.Little processor pair. It is about 50 minutes long and I think both you and your embedded software team might find this very useful, so please take a look and let me know what you think.
Brian Bailey – keeping you covered
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