The ESL dilemma

Does anyone remember The Innovators Dilemma, a book by Clayton Christensen? I am sure you do. It talks about why good companies fail when there are fundamental changes happening in an industry.

For a while everyone was talking about it and what it would mean for the EDA industry. Most of the companies that were the leaders in the time of schematic capture and gate-level design did not manage to make the transition to language-based RTL design.

When ESL first started to emerge I knew it would apply here as well, but was unsure about the outcome. Would Mentor, Synopsys, and Cadence fall into insignificance? Would the traditional EDA companies be able to make the transition to ESL? It was certainly beginning to look like it. Mentor, Cadence, and Forte had shown their ability to stabilize the emerging high-level synthesis market and verification with SystemC seemed to be well within the reach for the current simulators. How could they be upset from their position of dominance? And then it struck me…

Towards the end of last year I posted a blog that discussed what had to happen to increase the ubiquity of FPGAs. It received some great comments and I thank you all very much for those. I have also just finished a fundamentals course on prototyping, which can view for free here. Now as we know, the number of FPGA design starts is off the charts whereas ASIC starts are stable or falling.

Now take a look at the high-level synthesis offerings. Yes – they can target FPGAs, but few of the EDA vendors have wanted me to talk about those features when I write about them. They would much rather talk about targeting ASIC users. I have written about those tools quite extensively in my books and one of the things I have said is that designers do not have to fear for their jobs because these tools will just make them more productive. It will not give them skills they don’t already possess. A software developer can write C code, but that does not mean that they are instantly able to develop hardware. So, I believed all of that and dutifully wrote about it, and I do actually believe it. But that is not a good thing! That is part of the dilemma.

The EDA industry is trying to expand its market and it is clear that IP is one such area. We are also told that ESL is one of the fastest growing segments of EDA, but I have always felt that it is not getting anywhere close to reaching its full potential. ESL will only attain that goal when FPGAs do become ubiquitous and do start to follow the App type of market, and those Apps may indeed rely on FPGAs as the execution platform and high-level synthesis to get it there.

No, there is no way an EDA vendor will be able to charge $1/4M for that compiler, but as with Apps for phones or other similar types of consumer devices, the number of people creating Apps is huge. So if every desktop PC started to ship with an FPGA in it which could be used for accelerating Apps, as did many of the consumer devices, then we have the ubiquity I was talking about and with cheap enough synthesis technology that enables someone without hardware skills to get the App loaded into the FPGA, then we are approaching my new vision for ESL. It is fed by an IP industry and tools that enable devices to be customized in ways we can only imagine today.

So who are the leaders in ESL technology likely to be? As I have been saying for months, one way to look is at the companies producing the programmable system level chips, such as Cypress and TI. Without good programming tools they will not sell silicon and their systems are constrained enough to make the generation of tools easier. Of course this also means that they cannot become general purpose suppliers of tools.

The next level down we find the FPGA companies such as Xilinx and Altera. They have a harder problem because their systems have fewer restrictions and thus the software has to be more general and that means additional complexity to make it work for people with less hardware knowledge.

Of course the EDA companies have the hardest problem because there are no restrictions apart from those imposed by the tools themselves. But there is a third group, and I have to thank Lauro Rizzatti from EVE for bringing this to my attention. The companies that currently produce emulators or prototyping systems have to migrate a design onto the FPGA fabric without intervention from the user and they have been developing technology to move testbenches onto emulators for some time, so these companies have for all intents and purposes been getting into the high-level synthesis market.

Companies like National Instruments have been compiling from abstract design description into FPGSs for quite some time. Are these highly optimized implementations – probably not, but they only have to be good enough to fit into the resources available. There are software compilers out there that are better than other for producing faster implementations or smaller implementations, and competition is good. So I add these companies to my watch list for the next generation of successful EDA companies. Could EVE or NI be the next big EDA company? Crazier things have happened in the past.

Brian Bailey – keeping you covered