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OCP-IP Outstanding Contributor of the Year Award for 2011
Brian Bailey
12/19/2011 2:02 PM EST
Open Core Protocol International Partnership (OCP-IP) has announced that Cadence is the recipient of the annual Outstanding Contributor of the Year Award for 2011. The OCP-IP Governing Steering Committee grants this award each year to a member that makes key contributions to the further advancement of the OCP specification or supporting infrastructure. The committee specifically acknowledged Gabriele Zarri of Cadence for his leadership, commitment and contributions to OCP-IP’s Functional Verification Working Group (FVWG). Mr. Zarri played a key role in completing development for the latest version of the OCP-IP Compliance Document.
The OCP Compliance document will be released in the first quarter of 2012, and will include Compliance Checks and Functional Coverage. Compliance Checks describe 'legal' constraints for signals on an OCP interface, and eliminate the need for “best guess” verification by engineers, making certain an OCP interface complies with the specification, assuring verification quality and that IP blocks are compatible at the system level.
In addition, these checks define a set of rules for the OCP Specification. Constraints can be as simple as "check that a signal is never 0" or may be complex temporal expressions. If no check is violated by functional and/or formal verification, the logic is proven compliant with the protocol.
The compliance checks can be used in several different ways. Formal tools can use checks to ensure a design never violates them, proving OCP compliance, or they can be used to record the number of times a given restraint was hit. Functional verification tools can use the properties to build protocol checkers (inVerilog/VHDL/E/SystemC, etc.). By applying stimuli to the design under test (DUT) and verifying that protocol checkers are not reporting violations, OCP compliance is verified.
Functional Coverage is a technique to measure the quality of the stimuli generated by a verification test suite. It provides an objective view of the verification space and is used to measure the completeness of the verification of an OCP IP block. Guidelines, developed by the FVWG, eliminate the need for “best guess” verification by engineers, making certain an OCP interface complies with the current specification and ensuring verification quality and IP block compatibility at the system level.
Cadence has leveraged the work of the Functional Verification Working Group in its OCP Verification IP (VIP), including verification of the newest OCP 3.0 version with support for cache coherency.
Companies wishing to participate in the OCP-IP Functional Verification Working Group are invited to contact admin@ocpip.org
For the latest information about OCP-IP please see our newsletter at http://www.ocpip.org/newsletters.php
Brian Bailey – keeping you covered
If you found this article to be of interest, visit EDA Designline where you will find the latest and greatest design, technology, product, and news articles with regard to all aspects of Electronic Design Automation (EDA).
Also, you can obtain a highlights update delivered directly to your inbox by signing up for the EDA Designline weekly newsletter – just Click Here to request this newsletter using the Manage Newsletters tab (if you aren't already a member you'll be asked to register, but it's free and painless so don't let that stop you [grin]).
The OCP Compliance document will be released in the first quarter of 2012, and will include Compliance Checks and Functional Coverage. Compliance Checks describe 'legal' constraints for signals on an OCP interface, and eliminate the need for “best guess” verification by engineers, making certain an OCP interface complies with the specification, assuring verification quality and that IP blocks are compatible at the system level.
In addition, these checks define a set of rules for the OCP Specification. Constraints can be as simple as "check that a signal is never 0" or may be complex temporal expressions. If no check is violated by functional and/or formal verification, the logic is proven compliant with the protocol.
The compliance checks can be used in several different ways. Formal tools can use checks to ensure a design never violates them, proving OCP compliance, or they can be used to record the number of times a given restraint was hit. Functional verification tools can use the properties to build protocol checkers (inVerilog/VHDL/E/SystemC, etc.). By applying stimuli to the design under test (DUT) and verifying that protocol checkers are not reporting violations, OCP compliance is verified.
Functional Coverage is a technique to measure the quality of the stimuli generated by a verification test suite. It provides an objective view of the verification space and is used to measure the completeness of the verification of an OCP IP block. Guidelines, developed by the FVWG, eliminate the need for “best guess” verification by engineers, making certain an OCP interface complies with the current specification and ensuring verification quality and IP block compatibility at the system level.
Cadence has leveraged the work of the Functional Verification Working Group in its OCP Verification IP (VIP), including verification of the newest OCP 3.0 version with support for cache coherency.
Companies wishing to participate in the OCP-IP Functional Verification Working Group are invited to contact admin@ocpip.org
For the latest information about OCP-IP please see our newsletter at http://www.ocpip.org/newsletters.php
Brian Bailey – keeping you covered
If you found this article to be of interest, visit EDA Designline where you will find the latest and greatest design, technology, product, and news articles with regard to all aspects of Electronic Design Automation (EDA).
Also, you can obtain a highlights update delivered directly to your inbox by signing up for the EDA Designline weekly newsletter – just Click Here to request this newsletter using the Manage Newsletters tab (if you aren't already a member you'll be asked to register, but it's free and painless so don't let that stop you [grin]).
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