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Calling all people who care about power
Brian Bailey
2/7/2012 12:18 PM EST
When you become an editor, or in fact take on any new job, you quickly learn what you don’t know and the skills you need to improve upon. You also learn how to use the skills you do have to try and be better or different from your peers. Given the depth of my knowledge of the industry, I decided to try and do several series of articles that are more in-depth than you might usually expect to find in publications such as this. I made a first attempt with my series on prototyping late last year. I did an OK job, but I learned a lot from it.
One thing I learned was that I do not yet have all of the contacts that I need to make sure everyone gets a fair chance to contribute – so this time around, as I embark on another focused series of articles, I decided to write a blog about it as well. In this way – if anyone bothers to read my blogs, they will know what I am asking for and be able to send appropriate materials.
The second focus series will be on the subject of power. How to optimize it, deal with it – anything and everything from software to physics. These will be organized into a series of articles with an index, product listings, white papers, design articles etc. The complete list of things you can provide me with is listed below. These must all be sent to me by March 16th and they will start running in April – consuming the entire month.
So, get your thinking caps on and if you did not get my call for contributions sent to you via email, and you would to learn about future calls that I make, send me an email to have your name added to the list.
Thanks you for your attention. You will now be returned to your regularly scheduled programming.
Call for Contributions on Power
I would like to thank everyone who contributed to my series on prototyping. In general the feedback I received was very positive although there is room for improvement on my side. One area of criticism was the lack of advanced warning such that some companies did not have enough time to prepare or to place targeted advertising on the site. I want to correct that this time around.
This call is related to the area of power. With desktop computing now having been surpassed by mobile devices, power has rapidly become a major design consideration at all levels ranging from device physics, through RTL optimization, system level considerations, algorithm selection, software, power domains and variable frequency adoption, plus so many others. But it is not just mobile that is influencing power – huge server farms are looking for ways in which they power consumption can be reduced as well.
I expect to run the series in April and request that final submissions be sent to me by March 16th. I will assign release dates to articles at that point. Please get them to me before that if possible so that we can work out any kinks.
How you can contribute.
There are several ways that you and your company can participate in this focus series, such as:
Design Articles: These are typically 2500 words or more, contain 2 or more graphics (jpg please) and should be about design practices and not about tools specifically. This could also include architectures that help to minimize power. Short author bios and headshot should be included.
Technical Articles: These are similar to the design articles except they are about fundamental techniques not necessary support by a tool. Examples may be about clock gating or power domains, isolation, device physics, power scavenging etc. Research papers are also welcome in this category.
Case Studies: Similar to design articles but specifically related to a design experience.
Joint Editorials: I would like to work with one or a small number of companies that have access to data such as power trends. How much power do chips consume? How many power domains are on a typical SoC? What is the current state of the art in Design for Power? How much power can typically be saved at the device level, RTL, etc?
Opinions: These are generally 1000 words or less and contain an opinion related to design techniques, tools, IP or future considerations in power. Bio and headshot requested.
White papers: These are complete articles that may be tool specific. They do not have to be hosted in the EETimes site and will not features as such, but will be indexed in a common repository
Products: I would like to add a product directory for the tools, IP or services that are available. Each of these should be a tool title, single paragraph description and a link to you website.
Responses to Questions: Below are a series of questions. Send me your answers to any or all of the questions and they will be integrated together into editorial pieces with your comments attributed to you. Don’t see the question you wish I had asked – then ask and answer and I will include it.
What consumes the most power in a device?
Are what stage in the design process should engineers concentrate on power reduction?
What design techniques can provide the biggest bang for the buck in terms of power reduction?
What are the power issues related to chip/package/board interfaces?
How accurate can power estimation be at each level of abstraction?
What are the impacts of power switching on more sensitive parts of the design?
What additional strains does power optimization place on verification?
How do you optimize power in an FPGA-based design?
How big an impact can software really have on power consumption?
What advances can we expect to see in the next three years?
What advances can we expect to see in the next ten years?
Brian Bailey – keeping you covered
If you found this article to be of interest, visit EDA Designline where you will find the latest and greatest design, technology, product, and news articles with regard to all aspects of Electronic Design Automation (EDA).
Also, you can obtain a highlights update delivered directly to your inbox by signing up for the EDA Designline weekly newsletter – just Click Here to request this newsletter using the Manage Newsletters tab (if you aren't already a member you'll be asked to register, but it's free and painless so don't let that stop you [grin]).
One thing I learned was that I do not yet have all of the contacts that I need to make sure everyone gets a fair chance to contribute – so this time around, as I embark on another focused series of articles, I decided to write a blog about it as well. In this way – if anyone bothers to read my blogs, they will know what I am asking for and be able to send appropriate materials.
The second focus series will be on the subject of power. How to optimize it, deal with it – anything and everything from software to physics. These will be organized into a series of articles with an index, product listings, white papers, design articles etc. The complete list of things you can provide me with is listed below. These must all be sent to me by March 16th and they will start running in April – consuming the entire month.
So, get your thinking caps on and if you did not get my call for contributions sent to you via email, and you would to learn about future calls that I make, send me an email to have your name added to the list.
Thanks you for your attention. You will now be returned to your regularly scheduled programming.
Call for Contributions on Power
I would like to thank everyone who contributed to my series on prototyping. In general the feedback I received was very positive although there is room for improvement on my side. One area of criticism was the lack of advanced warning such that some companies did not have enough time to prepare or to place targeted advertising on the site. I want to correct that this time around.
This call is related to the area of power. With desktop computing now having been surpassed by mobile devices, power has rapidly become a major design consideration at all levels ranging from device physics, through RTL optimization, system level considerations, algorithm selection, software, power domains and variable frequency adoption, plus so many others. But it is not just mobile that is influencing power – huge server farms are looking for ways in which they power consumption can be reduced as well.
I expect to run the series in April and request that final submissions be sent to me by March 16th. I will assign release dates to articles at that point. Please get them to me before that if possible so that we can work out any kinks.
How you can contribute.
There are several ways that you and your company can participate in this focus series, such as:
Design Articles: These are typically 2500 words or more, contain 2 or more graphics (jpg please) and should be about design practices and not about tools specifically. This could also include architectures that help to minimize power. Short author bios and headshot should be included.
Technical Articles: These are similar to the design articles except they are about fundamental techniques not necessary support by a tool. Examples may be about clock gating or power domains, isolation, device physics, power scavenging etc. Research papers are also welcome in this category.
Case Studies: Similar to design articles but specifically related to a design experience.
Joint Editorials: I would like to work with one or a small number of companies that have access to data such as power trends. How much power do chips consume? How many power domains are on a typical SoC? What is the current state of the art in Design for Power? How much power can typically be saved at the device level, RTL, etc?
Opinions: These are generally 1000 words or less and contain an opinion related to design techniques, tools, IP or future considerations in power. Bio and headshot requested.
White papers: These are complete articles that may be tool specific. They do not have to be hosted in the EETimes site and will not features as such, but will be indexed in a common repository
Products: I would like to add a product directory for the tools, IP or services that are available. Each of these should be a tool title, single paragraph description and a link to you website.
Responses to Questions: Below are a series of questions. Send me your answers to any or all of the questions and they will be integrated together into editorial pieces with your comments attributed to you. Don’t see the question you wish I had asked – then ask and answer and I will include it.
What consumes the most power in a device?
Are what stage in the design process should engineers concentrate on power reduction?
What design techniques can provide the biggest bang for the buck in terms of power reduction?
What are the power issues related to chip/package/board interfaces?
How accurate can power estimation be at each level of abstraction?
What are the impacts of power switching on more sensitive parts of the design?
What additional strains does power optimization place on verification?
How do you optimize power in an FPGA-based design?
How big an impact can software really have on power consumption?
What advances can we expect to see in the next three years?
What advances can we expect to see in the next ten years?
Brian Bailey – keeping you covered
If you found this article to be of interest, visit EDA Designline where you will find the latest and greatest design, technology, product, and news articles with regard to all aspects of Electronic Design Automation (EDA).
Also, you can obtain a highlights update delivered directly to your inbox by signing up for the EDA Designline weekly newsletter – just Click Here to request this newsletter using the Manage Newsletters tab (if you aren't already a member you'll be asked to register, but it's free and painless so don't let that stop you [grin]).
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