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Free 2-day course: Designing with SmartFusion mixed-signal FPGAs

Clive Maxfield

2/7/2012 12:55 PM EST

Remembering that Microsemi's SmartFusion mixed-signal FPGAs include programmable digital fabric, programmable analog fabric, and a hard ARM Cortex-M3 microcontroller core, this course (which is to be held March 8-9, 2012) will be of interest to a wide audience…

I actually took this course myself around a year ago, and my head is still buzzing with everything I learned. Anyway, I just heard that the folks from Microsemi will be offering another FREE two-day training course on designing with their SmartFusion customizable system-on-chip (cSoC) in March at its Microsemi SoC Products Group offices in San Jose, CA (live online training also available).

The official course description is shown below. Click Here to register.

Designing with SmartFusion is a 2-day class for FPGA designers, embedded designers and firmware engineers who are designing with Microsemi's SmartFusion mixed signal FPGAs. This class describes the SmartFusion architecture, including SmartFusion microcontroller subsystem (MSS), analog compute engine (ACE) and FPGA fabric along with the software tools and design flows for implementing SmartFusion designs. Hands-on lab exercises targeting the SmartFusion Evaluation kit are included to provide practical applications of the material presented.

Course Objectives

  • Development with and understanding of the SmartFusion architecture details
  • Development with and understand of the SmartFusion design flows to quickly implement SmartFusion applications
Students should have a basic understanding of the Microsemi ProASIC3 flash-based FPGA architecture. Students who are unfamiliar with ProASIC3 architecture should attend the Designing with ProASIC3 training class.

Course Requirements
  • Experience with PCs, Windows operating system, Microsemi Libero SoC toolset and software development tools, such as SoftConsole, Keil or IAR, are recommended.

Day 1: SmartFusion Microcontroller Subsystem
(Intended for all engineers who are implementing SmartFusion designs)
  • SmartFusion MSS architecture
  • SmartFusion MSS I/Os
  • SmartDesign MSS configurator
  • Firmware drivers and sample projects for SoftConsole, Keil and IAR toolchains
  • Hands-on labs

Day 2: SmartFusion FPGA Fabric Interface
(Intended for engineers who want to implement logic in the SmartFusion FPGA fabric)
  • SmartFusion FPGA fabric resources and fabric interface
  • SmartFusion digital I/Os
  • Adding user logic in SmartFusion designs
  • Microsemi Libero SoC design flow for SmartFusion


If you found this article to be of interest, visit Programmable Logic Designline where you will find the latest and greatest design, technology, product, and news articles with regard to programmable logic devices of every flavor and size (FPGAs, CPLDs, CSSPs, PSoCs...).

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