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EDA/IP Weekly Roundup – Apr 4th
Brian Bailey
4/4/2012 10:04 AM EDT
EDA/IP Weekly Roundup – Apr 4th
This is a roundup of news or activities in the past few days that may be of interest to people. It appears as if I will have to split this into several pieces before long and provide a tools roundup, a research roundup and an IP roundup. Any thoughts?
Dialog Semiconductor has announced it is working closely with TSMC to develop its next generation of bipolar-CMOS-DMOS (BCD) technology specifically tailored to high-performance power management ICs (PMICs) for portable devices. The BCD process can support the integration of advanced logic, analogue and high-voltage features, including FET type transistors. The transition to 0.13-micron greatly enhances a PMICs power efficiency through a significant reduction of Rds(on), leading to more energy efficient integrated circuit (IC) designs.
Open-Silicon and Analog Bits have announced that Open-Silicon has successfully integrated 25 Analog Bits IP cores into complex ASIC and SoC designs. The IP cores are silicon-proven down to 28nm and across various foundry processes, and meet Open-Silicon’s stringent IP qualification requirements. In one design example, Open-Silicon and Analog Bits worked together to craft a high performance memory interface using many rows of custom Analog Bits area IO buffers, allowing the design of a high bandwidth interface to external memory without consuming a lot of die periphery for the interface.
The worldwide semiconductor foundry market totaled $29.8 billion in 2011, a 5.1 percent increase from 2010, according to Gartner, Inc. Analysts said the semiconductor supply chain experienced some impact from the Japanese disasters and Thailand flooding. However, without the steep depreciation of U.S. currency, analysts said that foundry growth in 2011 would have been just 0.7 percent. The only change in the top five is that TowerJazz moved into 5th place displacing Dongbu HiTek who dropped to 8th place. TSMC, UMC, GlobalFoundries and SMIC remain the top 4. Gartner also notes that if the Apple wafer business were included in the Samsung numbers, it would put them in 4th place.
ABI research says that mobile device semiconductors were one of the few bright spots in a chipset market that stalled in 2011. Revenue from chipsets designed for mobile devices increased by more than 20% to $35 billion, while the total semiconductor market limped out of 2011 with just 2% year-on-year growth. Platform ICs (including modems, applications processors, RF components, and PMUs) account for the bulk of overall revenues, but are becoming an increasingly competitive section of the market. Suppliers including Qualcomm, ST-Ericsson, MediaTek, Intel, Texas Instruments, Broadcom, Marvell, and Renesas Mobile have positioned themselves as platform solution suppliers and the top 10 suppliers now account for more than 75% of total revenues and their dominance will continue to build as niche suppliers are acquired or muscled out of the market.
Synopsys has announced the latest release of its Synplify Pro® and Synplify® Premier FPGA synthesis tools. The Synplify 2012.03 products include improved synthesis algorithms that accelerate runtime by up to 30 percent. In addition, the Synplify Premier software is enhanced with a new continue-on-error feature to address FPGA designers' need for fast turnaround time by enabling them to generate a report and fix all errors resulting from missing or incorrect design definitions at the end of the hardware description language (HDL) compilation step rather than incrementally fixing an error and rerunning the compile step. This capability is especially important with SoC prototypers who may not be intimately familiar with the HDL code they have to implement in an FPGA. Additionally, the new Synplify Premier software release further automates the process of building high reliability and fault tolerance into an FPGA design using a combination of advanced features including selective triple modular redundancy (TMR), fault-tolerant error correcting code (ECC) memories and Hamming-3 encoding for detection and correction of soft errors.
Analog Devices has announced that it has acquired Multigig, Inc., a privately-held San Jose, California, company specializing in high-performance clocking technology. The acquisition will enhance ADI’s clocking capabilities in stand-alone and embedded applications, and will strengthen ADI’s position in delivering high-speed signal processing solutions.
Does anyone else see the irony in this next release?
Kilopass Technology has announced that its XPM (eXtra Permanent Memory) IP is integrated into a Set-Top Box (STB) SoC being designed by SICMICRO (Chongqing Silian Microelectronics Co., Ltd.) based in Beijing Zhongguancun Science Park, China. Because the memory will contain encryption key storage, the failure of passive, semi-invasive, and invasive tampering methods to hack XPM NVM IP contributed to winning the design. The ability to securely reprogram the memory in the field to enable, change, or rescind encryption keys was also a factor.
Now is that to protect content (copyright) or to allow the government to protect information?
CEVA has announced an implementation of the popular Skype™ SILK™ super wideband speech codec optimized for the 32-bit CEVA-TeakLite-III family of audio DSPs. The SILK super wideband 24 KHz codec, developed and used by Skype, enables high quality voice communications through PC, mobile device and Smart TV applications. The computational complexity of wideband codecs, including the SILK codec, requires native 32-bit data processing rather than traditional 16 or 24-bit DSPs in order to achieve the optimal performance.
Synopsys’ StarRC™ parasitic extraction solution has been certified by UMC for its latest 28-nanometer (nm) process technologies. The StarRC solution delivered silicon-validated accuracy on UMC's evaluation designs to meet the qualification criteria for its advanced 28-nm Poly SiON and High K/Metal gate processes. The StarRC technology files are immediately available to UMC customers working with its 28-nm processes.
Open Core Protocol International Partnership (OCP-IP) today announced the availability of version 2_2x2_2 of the OCP Modeling Kit. The new version boasts greater robustness of data in payload-event-queues, a modification of thread-busy signaling API, added support for interrupts, sideband error signaling, sideband user flags, added TLM2-native adapters between TL3 and TL1, and added TLM2-native adapters between TL1 and RTL signals (TL0).
The Kit includes everything needed for immediate use. For a detailed listing of everything included see http://www.ocpip.org/uploads/documents/OCP_TLM_Datasheet.new.pdf.
A fully functional version of the Kit without monitors is also available to non-members, via click through research license agreement from www.ocpip.org.
NXP Semiconductors is to acquire the Dutch electronic design and IP company Catena Group. NXP has a long-standing relationship with Catena, and on completion of the deal, NXP will own 100% of the Catena shares, while Catena will continue to operate as a separate design company. This will enable Catena to continue serving third party companies. Catena is a maker of Radio Frequency Communication, Analog, Mixed Signal and Digital Signal Processing IP. NXP wanted this IP so they could capitalize on the growing demand from car manufacturers for new technologies such as CO2 reduction and Connected Mobility, wirelessly connecting the car to infrastructure, to other cars, as well as connecting the car to the driver.
According to a new market research report published by MarketsandMarkets, the global Semiconductor IP market by revenue is estimated to grow from $2.5 billion in 2012 to $5.70 billion in 2017 at a CAGR of 14.47%. The Semiconductor IP Market is growing in both the Integrated Circuit IP and System-on-Chip IP sub-sectors, but the revenues from the SoC IP segment are expected to grow faster at an estimated CAGR of 19.16% from 2012 to 2017. The Application Specific and Programmable (FPGA and PLD) IP Segments in both ICs and SoCs are the fastest growing segments, next to the primary revenue contributor - the SoC Processor IP segment which is estimated to grow at a phenomenal CAGR of 21.16%. All the IP segments such as Application Specific, Programmable, Digital, Analog & Mixed Signal, Memory IP markets and so on, have much faster growth rates in the SoC segment, than their respective markets in the IC segment.
Brian Bailey – keeping you covered
If you found this article to be of interest, visit EDA Designline where you will find the latest and greatest design, technology, product, and news articles with regard to all aspects of Electronic Design Automation (EDA).
Also, you can obtain a highlights update delivered directly to your inbox by signing up for the EDA Designline weekly newsletter – just Click Here to request this newsletter using the Manage Newsletters tab (if you aren't already a member you'll be asked to register, but it's free and painless so don't let that stop you [grin]).
This is a roundup of news or activities in the past few days that may be of interest to people. It appears as if I will have to split this into several pieces before long and provide a tools roundup, a research roundup and an IP roundup. Any thoughts?
Dialog Semiconductor has announced it is working closely with TSMC to develop its next generation of bipolar-CMOS-DMOS (BCD) technology specifically tailored to high-performance power management ICs (PMICs) for portable devices. The BCD process can support the integration of advanced logic, analogue and high-voltage features, including FET type transistors. The transition to 0.13-micron greatly enhances a PMICs power efficiency through a significant reduction of Rds(on), leading to more energy efficient integrated circuit (IC) designs.
Open-Silicon and Analog Bits have announced that Open-Silicon has successfully integrated 25 Analog Bits IP cores into complex ASIC and SoC designs. The IP cores are silicon-proven down to 28nm and across various foundry processes, and meet Open-Silicon’s stringent IP qualification requirements. In one design example, Open-Silicon and Analog Bits worked together to craft a high performance memory interface using many rows of custom Analog Bits area IO buffers, allowing the design of a high bandwidth interface to external memory without consuming a lot of die periphery for the interface.
The worldwide semiconductor foundry market totaled $29.8 billion in 2011, a 5.1 percent increase from 2010, according to Gartner, Inc. Analysts said the semiconductor supply chain experienced some impact from the Japanese disasters and Thailand flooding. However, without the steep depreciation of U.S. currency, analysts said that foundry growth in 2011 would have been just 0.7 percent. The only change in the top five is that TowerJazz moved into 5th place displacing Dongbu HiTek who dropped to 8th place. TSMC, UMC, GlobalFoundries and SMIC remain the top 4. Gartner also notes that if the Apple wafer business were included in the Samsung numbers, it would put them in 4th place.
ABI research says that mobile device semiconductors were one of the few bright spots in a chipset market that stalled in 2011. Revenue from chipsets designed for mobile devices increased by more than 20% to $35 billion, while the total semiconductor market limped out of 2011 with just 2% year-on-year growth. Platform ICs (including modems, applications processors, RF components, and PMUs) account for the bulk of overall revenues, but are becoming an increasingly competitive section of the market. Suppliers including Qualcomm, ST-Ericsson, MediaTek, Intel, Texas Instruments, Broadcom, Marvell, and Renesas Mobile have positioned themselves as platform solution suppliers and the top 10 suppliers now account for more than 75% of total revenues and their dominance will continue to build as niche suppliers are acquired or muscled out of the market.
Synopsys has announced the latest release of its Synplify Pro® and Synplify® Premier FPGA synthesis tools. The Synplify 2012.03 products include improved synthesis algorithms that accelerate runtime by up to 30 percent. In addition, the Synplify Premier software is enhanced with a new continue-on-error feature to address FPGA designers' need for fast turnaround time by enabling them to generate a report and fix all errors resulting from missing or incorrect design definitions at the end of the hardware description language (HDL) compilation step rather than incrementally fixing an error and rerunning the compile step. This capability is especially important with SoC prototypers who may not be intimately familiar with the HDL code they have to implement in an FPGA. Additionally, the new Synplify Premier software release further automates the process of building high reliability and fault tolerance into an FPGA design using a combination of advanced features including selective triple modular redundancy (TMR), fault-tolerant error correcting code (ECC) memories and Hamming-3 encoding for detection and correction of soft errors.
Analog Devices has announced that it has acquired Multigig, Inc., a privately-held San Jose, California, company specializing in high-performance clocking technology. The acquisition will enhance ADI’s clocking capabilities in stand-alone and embedded applications, and will strengthen ADI’s position in delivering high-speed signal processing solutions.
Does anyone else see the irony in this next release?
Kilopass Technology has announced that its XPM (eXtra Permanent Memory) IP is integrated into a Set-Top Box (STB) SoC being designed by SICMICRO (Chongqing Silian Microelectronics Co., Ltd.) based in Beijing Zhongguancun Science Park, China. Because the memory will contain encryption key storage, the failure of passive, semi-invasive, and invasive tampering methods to hack XPM NVM IP contributed to winning the design. The ability to securely reprogram the memory in the field to enable, change, or rescind encryption keys was also a factor.
Now is that to protect content (copyright) or to allow the government to protect information?
CEVA has announced an implementation of the popular Skype™ SILK™ super wideband speech codec optimized for the 32-bit CEVA-TeakLite-III family of audio DSPs. The SILK super wideband 24 KHz codec, developed and used by Skype, enables high quality voice communications through PC, mobile device and Smart TV applications. The computational complexity of wideband codecs, including the SILK codec, requires native 32-bit data processing rather than traditional 16 or 24-bit DSPs in order to achieve the optimal performance.
Synopsys’ StarRC™ parasitic extraction solution has been certified by UMC for its latest 28-nanometer (nm) process technologies. The StarRC solution delivered silicon-validated accuracy on UMC's evaluation designs to meet the qualification criteria for its advanced 28-nm Poly SiON and High K/Metal gate processes. The StarRC technology files are immediately available to UMC customers working with its 28-nm processes.
Open Core Protocol International Partnership (OCP-IP) today announced the availability of version 2_2x2_2 of the OCP Modeling Kit. The new version boasts greater robustness of data in payload-event-queues, a modification of thread-busy signaling API, added support for interrupts, sideband error signaling, sideband user flags, added TLM2-native adapters between TL3 and TL1, and added TLM2-native adapters between TL1 and RTL signals (TL0).
The Kit includes everything needed for immediate use. For a detailed listing of everything included see http://www.ocpip.org/uploads/documents/OCP_TLM_Datasheet.new.pdf.
A fully functional version of the Kit without monitors is also available to non-members, via click through research license agreement from www.ocpip.org.
NXP Semiconductors is to acquire the Dutch electronic design and IP company Catena Group. NXP has a long-standing relationship with Catena, and on completion of the deal, NXP will own 100% of the Catena shares, while Catena will continue to operate as a separate design company. This will enable Catena to continue serving third party companies. Catena is a maker of Radio Frequency Communication, Analog, Mixed Signal and Digital Signal Processing IP. NXP wanted this IP so they could capitalize on the growing demand from car manufacturers for new technologies such as CO2 reduction and Connected Mobility, wirelessly connecting the car to infrastructure, to other cars, as well as connecting the car to the driver.
According to a new market research report published by MarketsandMarkets, the global Semiconductor IP market by revenue is estimated to grow from $2.5 billion in 2012 to $5.70 billion in 2017 at a CAGR of 14.47%. The Semiconductor IP Market is growing in both the Integrated Circuit IP and System-on-Chip IP sub-sectors, but the revenues from the SoC IP segment are expected to grow faster at an estimated CAGR of 19.16% from 2012 to 2017. The Application Specific and Programmable (FPGA and PLD) IP Segments in both ICs and SoCs are the fastest growing segments, next to the primary revenue contributor - the SoC Processor IP segment which is estimated to grow at a phenomenal CAGR of 21.16%. All the IP segments such as Application Specific, Programmable, Digital, Analog & Mixed Signal, Memory IP markets and so on, have much faster growth rates in the SoC segment, than their respective markets in the IC segment.
Brian Bailey – keeping you covered
If you found this article to be of interest, visit EDA Designline where you will find the latest and greatest design, technology, product, and news articles with regard to all aspects of Electronic Design Automation (EDA).
Also, you can obtain a highlights update delivered directly to your inbox by signing up for the EDA Designline weekly newsletter – just Click Here to request this newsletter using the Manage Newsletters tab (if you aren't already a member you'll be asked to register, but it's free and painless so don't let that stop you [grin]).
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