Tektronix believes in embedded instruments

Embedded instrumentation has been one of those technologies that sound like such a great idea and there have been several companies that have tried to come up with tools and IP that would help with the insertion of the necessary memory and logic to make this possible. Several business models have been tried but at the end of the day, it seems as if ASIC developers were reluctant to give up any silicon area for the insurance policy it would provide or the ability to see what is going on inside the chip. One such company was Veridae, who came out of stealth mode at the end of 2010. After just a few months and their first appearance at DAC, they were acquired by Tektronix. Now DAC is rolling around a year after that event and I was interested to see what has happened and what may have changed in the general market for this type of solution. On 7/5/11 they were acquired by Tektronix and since then things have been very quiet

I spoke with Brad Quinton, Chief Architect who has been with the company since inception. He told me that here has been a dramatic reduction in the usefulness of external instruments because interfaces are hidden and those left are often high-speed serial interfaces that are not amenable to probing. So external equipment is less useful for debug, but still the problems remain and are in fact getting worse. Embedded instruments, he said, are the clear solution.

With embedded instruments you design up front what you wish to make visible for verification and validation. The advantage is that design teams can guide downstream teams towards the things they need to be looking at. Embedded instruments can ride the technology wave. A chip designer can dedicate a percentage of their die – say 2%. I asked how willing companies are today to do that. Dave Orecchio said they have 3 or 4 customers that say X percentage of die should be dedicated to this functionality. They are doing this no matter if they use external IP or develop the capability internally.
The trick is to provide as much value as possible in the smallest silicon area. For this Tektronix employs several techniques such as instrumentation sharing and on the fly compression. In addition, when well-designed, the instrumentation can be used for things other than validation. Software guys can use it to help with performance optimization. You ship your instruments along with the product, so it can also be made available to 3rd party software developers. However, the biggest application today is digital debug during design phase.



I asked about their licensing model. Dave, being the typical salesman, was vague on this. He said for FPGA users, they will spend no more $10,000 per tool. ASIC prototyping $20,000 and for SoC it must cost less than their own internal development and be 10X better. However Tektronix has not yet established their long term business model. For example, they have not yet decided if it should be a tool or IP sale.



Competition is heating up as FPGA prototyping is becoming a big market. Brad said that their system is designed to not slow down the underlying design. This makes it more amenable to in-circuit operation rather than being stimulus driven. Solutions with attached hardware seem to have some limitations in I/O performance. The Tektronix solution wants to be 100% contained in the FPGA.
In the future, Tektronix intends to leverage the vast experience that they have in instrumentation and analysis equipment. Examples of this include the correlated views they provide for digital, analog and RF and the ability to comprehend the data captured such as providing different views of abstraction.

Tektronix is at DAC this year Booth #302


Brian Bailey – keeping you covered

---

If you found this article to be of interest, visit EDA Designline where you will find the latest and greatest design, technology, product, and news articles with regard to all aspects of Electronic Design Automation (EDA).

Also, you can obtain a highlights update delivered directly to your inbox by signing up for the EDA Designline weekly newsletter – just Click Here to request this newsletter using the Manage Newsletters tab (if you aren't already a member you'll be asked to register, but it's free and painless so don't let that stop you).