If we needed further proof that portable applications are the memory market of the future, the latest release of the DDR PHY Interface (DFI) Group’s DFI 3.1 specification features support for LPDDR3, which is targeted at portable computing platforms like tablets and smart phones. Defining an interface protocol between memory controller logic and PHY interfaces, the DFI spec defines the signals, timing, and functionality required for efficient communication across the interface. The specification is designed to be used by developers of both memory controllers and PHY designs, but doesn’t place any restrictions on the how the memory controller interfaces to the system design, or how the PHY interfaces to the memory devices.
Specific changes in the new release include:
- Added support for LPDDR3
- Enhanced the Low Power Control Interface to have separate control and data requests.
- A PHY-Requested Training Interface to enable PHY-independent training in non-DFI training mode.
Version 3.0 (paradoxically released two days after version 3.1) features:
- Added DDR4 DRAM support for CRC, CA parity timing, CRC and CA parity errors, DBI, leveling support, and CA modifications.
- Added DFI read data rotation clarification, read data pointer resynchronization, independent timing of DFI read data valid per data slice, data path chip select, error interface, and programmable parameters.
- Renamed PHY evaluation mode.
- Removed MC evaluation mode and tphy_wrdelay timing parameter.
- Added support for refresh during training, multiple CS training, enhancements to the update interface and the idle bus definition.
"Consumer mobile electronics continue to demand both increased memory performance and power efficiency, requiring the use of new technologies such as LPDDR3 memory," said John MacLaren, chairman of the DFI Group. "We are excited to add LPDDR3 mobile memory support to the DFI standard as it means the benefits of this technology will now be available to the rapidly growing mobile computing market."
Download the preliminary DFI 3.1 memory specification now for free at www.ddr-phy.org
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