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Gary Smith kicks off DAC with his industry commentary
Brian Bailey
6/5/2012 11:28 AM EDT
Gary Smith started off the first morning of DAC (Monday) serenading the early attendees of the pavilion panel with live music. He regretted that they were performing these days without Aart De Geus. I arrived just as the last chord rang out across the exhibition hall in the Moscone center. While not all of the seats were taken, there was a large crowd of people completely enveloping the area. Gary stated that he would be covering two things, first his must see list for DAC and secondly a recap of the presentation given last night. This blog will talk about the themes that are currently on people’s minds and his must see list.
Subject number one was debug. “It’s all about debug”, Gary said. There is Mentor with many core SW debug. Many core, Gary said basically mean heterogeneous computing, and not homogeneous, as most of the embedded industry has focused on. Then there are Mentor, EVE and Cadence who now support Transaction level acceleration and emulation with debug. There is also Springsoft who have been the kings of debug for a long time, Axiom with server farm design debug, Vennsa who tackle automated debugging and IC Manage who provide tools for enterprise wide design tracking.
His next theme was – wait for it, that this could be the year of the Silicon Virtual Prototype. Gary chose to highlight Atrenta with the GenSys product. He gave a very strong thumbs up to what Xilinx has achieved with Vivado and Entasys, although he was uncertain if this was an SVP or an SoC Integration platform. Either way, he said, you should check them out.
Within the ESL tools category, Gary talked about revenue figures for Calypto and Forte, the two leaders in the transaction-level synthesis market. Gary chose to rename this from HLS, but his new name is just as bad and I will continue to call it transaction-level synthesis. He said that it will take a few years to show who the clear leader is in this market because the accounting model changed when Catapult moved from Mentor to Calypto. He made it quite clear that he believes Catapult is number one. For Transaction-level acceleration and emulation, Gary said they had seen 15% growth, but for EVE it was higher.
Gary then talked about Synopsys acquiring Magma and said that the biggest impact it will have is that average sales prices will rise by 17.5% and that end users need to get used to paying higher prices. No more bargain basement prices will be available.
Gary then turned his attention to the intelligent testbench category. He highlighted Breker, who he said was one of many companies in this area several years ago when the category was created. Breker had gone back to the woodshed and emerged with a really good product and had the best technology base out there. He also mentioned VWorks who had a software virtual prototype and used them as an example of many new companies coming into the market from outside of the US. VWorks is an Australian company.
He then talked about how the embedded software market had got things wrong by focusing on homogenous computing and that this technology had come to a halt at 8 cores. Because of this ARM and Mentor basically had to build their own tools from the ground up and that in a few years the industry would look at Mentor with very different eyes than they do today.
In IC layout, Gary mentioned JEDAT, ICScape and AtopTech. He also said that he doubts (my words, not his) that eUV will ever actually happen.
For RTL Signoff he mentioned Atrenta and Blue Pearl. He liked Blue Pearl for attacking the FPGA market. He said with FPGA designs now being 10M gates, that a “blow and go” approach is no longer possible. He also said that Real Intent and Jasper had made very big strides in this area.
For power and thermal analysis, Gary tipped his hat towards Apache and also mentioned that Docea has an ESL power estimation tool.
Gary also mentioned that DC is being challenged by Oasys. He said that all of the bells and whistles of DC are no longer necessary in a Multi-platform design scenario, because large parts of the design would be tagged as don’t touch.
Finally, he scoffed at cloud computing and said it just doesn’t fit with EDA types of problem. He said if a tool wanted to work on a farm, then that would continue, but a cloud is nothing more than a public farm. He said that there is no point talking to Amazon about EDA problems, instead go talk to Xuropa who understand this, and Duolog who uses Xuropa well. Axiom and Solido also have offerings here.
Finally he said that Synopsys was the surprise of the show as they jump into the world of Multi-Platform Based Design – and that is another story…
Brian Bailey – keeping you covered
If you found this article to be of interest, visit EDA Designline where you will find the latest and greatest design, technology, product, and news articles with regard to all aspects of Electronic Design Automation (EDA).
Also, you can obtain a highlights update delivered directly to your inbox by signing up for the EDA Designline weekly newsletter – just Click Here to request this newsletter using the Manage Newsletters tab (if you aren't already a member you'll be asked to register, but it's free and painless so don't let that stop you).
Subject number one was debug. “It’s all about debug”, Gary said. There is Mentor with many core SW debug. Many core, Gary said basically mean heterogeneous computing, and not homogeneous, as most of the embedded industry has focused on. Then there are Mentor, EVE and Cadence who now support Transaction level acceleration and emulation with debug. There is also Springsoft who have been the kings of debug for a long time, Axiom with server farm design debug, Vennsa who tackle automated debugging and IC Manage who provide tools for enterprise wide design tracking.
His next theme was – wait for it, that this could be the year of the Silicon Virtual Prototype. Gary chose to highlight Atrenta with the GenSys product. He gave a very strong thumbs up to what Xilinx has achieved with Vivado and Entasys, although he was uncertain if this was an SVP or an SoC Integration platform. Either way, he said, you should check them out.
Within the ESL tools category, Gary talked about revenue figures for Calypto and Forte, the two leaders in the transaction-level synthesis market. Gary chose to rename this from HLS, but his new name is just as bad and I will continue to call it transaction-level synthesis. He said that it will take a few years to show who the clear leader is in this market because the accounting model changed when Catapult moved from Mentor to Calypto. He made it quite clear that he believes Catapult is number one. For Transaction-level acceleration and emulation, Gary said they had seen 15% growth, but for EVE it was higher.
Gary then talked about Synopsys acquiring Magma and said that the biggest impact it will have is that average sales prices will rise by 17.5% and that end users need to get used to paying higher prices. No more bargain basement prices will be available.
Gary then turned his attention to the intelligent testbench category. He highlighted Breker, who he said was one of many companies in this area several years ago when the category was created. Breker had gone back to the woodshed and emerged with a really good product and had the best technology base out there. He also mentioned VWorks who had a software virtual prototype and used them as an example of many new companies coming into the market from outside of the US. VWorks is an Australian company.
He then talked about how the embedded software market had got things wrong by focusing on homogenous computing and that this technology had come to a halt at 8 cores. Because of this ARM and Mentor basically had to build their own tools from the ground up and that in a few years the industry would look at Mentor with very different eyes than they do today.
In IC layout, Gary mentioned JEDAT, ICScape and AtopTech. He also said that he doubts (my words, not his) that eUV will ever actually happen.
For RTL Signoff he mentioned Atrenta and Blue Pearl. He liked Blue Pearl for attacking the FPGA market. He said with FPGA designs now being 10M gates, that a “blow and go” approach is no longer possible. He also said that Real Intent and Jasper had made very big strides in this area.
For power and thermal analysis, Gary tipped his hat towards Apache and also mentioned that Docea has an ESL power estimation tool.
Gary also mentioned that DC is being challenged by Oasys. He said that all of the bells and whistles of DC are no longer necessary in a Multi-platform design scenario, because large parts of the design would be tagged as don’t touch.
Finally, he scoffed at cloud computing and said it just doesn’t fit with EDA types of problem. He said if a tool wanted to work on a farm, then that would continue, but a cloud is nothing more than a public farm. He said that there is no point talking to Amazon about EDA problems, instead go talk to Xuropa who understand this, and Duolog who uses Xuropa well. Axiom and Solido also have offerings here.
Finally he said that Synopsys was the surprise of the show as they jump into the world of Multi-Platform Based Design – and that is another story…
Brian Bailey – keeping you covered
If you found this article to be of interest, visit EDA Designline where you will find the latest and greatest design, technology, product, and news articles with regard to all aspects of Electronic Design Automation (EDA).
Also, you can obtain a highlights update delivered directly to your inbox by signing up for the EDA Designline weekly newsletter – just Click Here to request this newsletter using the Manage Newsletters tab (if you aren't already a member you'll be asked to register, but it's free and painless so don't let that stop you).
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