Accellera make new version of SystemC library available

7/17/2012 10:08 AM EDT

While it used to be called the reference simulator, it is now offered as a proof-of-concept library in an attempt to show that this is not the definitive version of the standard. This was a problem for the EDA companies in the early days as customers wanted “the” SystemC and not a vendor’s interpretation of it. This was probably stilled spurred by the problems associated with the early Verilog simulators where matching the reference was an almost impossible task.

Version 2.3.0 is available at no charge to the worldwide electronic design community. Compatible with the newly revised IEEE 1666 "Standard SystemC Language Reference Manual," announced by the IEEE Standards Association in November 2011, version 2.3.0 provides a number of important new features, including support for transaction-level modeling (TLM), a critical approach to enable high level and more efficient design of complex ICs and SoCs in a single library.

New extensive process control features enable modeling of concepts such as power domains and abstract schedulers. A new first-class events list and a new container for SystemC objects simplify the description of generic and scalable models. In addition, an improved simulation API and a new thread safety mechanism will allow much better interaction with external tools and support for multi-threading.

Documentation has been reorganized for clarity, and there is a new document highlighting the features added for compatibility with the latest version of the SystemC standard. The library, installation notes and readme files have been updated to support installation on the latest operating systems and compilers. To ensure a high quality release, the library has been reviewed and tested by members of the SystemC Language Working Group, and feedback from the recently completed public review has been incorporated in the release.