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Best of the Web, August 17
Brian Bailey
8/17/2012 4:09 AM EDT
This weekly posting provides a condensation of some of the best EDA and IP blogs from the web over the past week. If you have a blog feed that you would like me to consider, please let me know and I will include it in future editions.
This week’s winner is:
And then the announcer said... - Nazita Saye almost answers the questions about the wind resistance that my hair causes.
Other good blogs, papers and articles include:
Co-Designed Cache Coherency Architecture for Embedded Multicore Systems - Jussara Marandola, USP and Loic Cudennec, CEA-LIST
The Olympics Are Over - Michael Ford compares product development to a sport
Curiously embedded – Colin Walls looks at the specs for Curiosity
The Emerging India ESDM Story, Part 1: Terminus Circuits develops Wireless Power Charger - Faisal Kawoosa
Laws and Verification - Gaurav Jalan finds lots of connections.
Designer View – Automating Analog Design with Intent Capture – Richard Goering
Rambus significantly speed up their DFT Logic and Timing Verification in Mixed-Signal Designs using CustomSim-VCS - Hélène Thibiéroz
A “Reflection” on Chip-Level Debugging with Specman/e and SimVision
Getting to automotive quality levels with NVM IP - Navraj Nandra
Brian Bailey – keeping you covered
If you found this article to be of interest, visit EDA Designline where you will find the latest and greatest design, technology, product, and news articles with regard to all aspects of Electronic Design Automation (EDA).
Also, you can obtain a highlights update delivered directly to your inbox by signing up for the EDA Designline weekly newsletter – just Click Here to request this newsletter using the Manage Newsletters tab (if you aren't already a member you'll be asked to register, but it's free and painless so don't let that stop you).
This week’s winner is:
And then the announcer said... - Nazita Saye almost answers the questions about the wind resistance that my hair causes.
Other good blogs, papers and articles include:
Co-Designed Cache Coherency Architecture for Embedded Multicore Systems - Jussara Marandola, USP and Loic Cudennec, CEA-LIST
The Olympics Are Over - Michael Ford compares product development to a sport
Curiously embedded – Colin Walls looks at the specs for Curiosity
The Emerging India ESDM Story, Part 1: Terminus Circuits develops Wireless Power Charger - Faisal Kawoosa
Laws and Verification - Gaurav Jalan finds lots of connections.
Designer View – Automating Analog Design with Intent Capture – Richard Goering
Rambus significantly speed up their DFT Logic and Timing Verification in Mixed-Signal Designs using CustomSim-VCS - Hélène Thibiéroz
A “Reflection” on Chip-Level Debugging with Specman/e and SimVision
Getting to automotive quality levels with NVM IP - Navraj Nandra
Brian Bailey – keeping you covered
If you found this article to be of interest, visit EDA Designline where you will find the latest and greatest design, technology, product, and news articles with regard to all aspects of Electronic Design Automation (EDA).
Also, you can obtain a highlights update delivered directly to your inbox by signing up for the EDA Designline weekly newsletter – just Click Here to request this newsletter using the Manage Newsletters tab (if you aren't already a member you'll be asked to register, but it's free and painless so don't let that stop you).
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