Blog
Tell us What You Think
We want to know what you thought about this Discussion. Let us know by adding a comment.
EDA/IP Weekly Roundup – August 22nd
Brian Bailey
8/22/2012 9:30 AM EDT
This is a roundup of news or activities in the past few days that may be of interest to people.
Designers of micro server circuit boards based on the Intel® Atom™ processor now have a tool capable of non-intrusively validating the signal integrity on high-speed input/output (HSIO) and memory buses. The ScanWorks® platform for embedded instruments from ASSET® InterTech is a design validation tool for Intel Atom designs that does not rely on placing a physical probe on a bus to monitor its signal integrity. Because buses with speeds in excess of 5 gigabits per second (Gbps) become super-sensitive to capacitive coupling effects, the signaling on these buses is distorted when a physical probe is placed on them. To counteract this, Intel developed and is implementing an instrumentation technology that is embedded in its advanced chips. ASSET’s ScanWorks HSIO for Intel Architecture (IA) is the first and only non-intrusive software-based toolkit to take advantage of Intel’s embedded instrumentation technology.
Synopsys announces that University of Rochester students Anthony Visconti and Brett Sternfield and University of Alabama in Huntsville student Josh Walters are the winners of the 2012 Robert S. Hilbert Memorial Optical Design Competition. The competition was established in 2000 by Optical Research Associates (ORA®), now the Optical Solutions Group at Synopsys, and was named in honor of ORA's former president and chief executive officer Robert S. Hilbert. Anthony Visconti of the University of Rochester was recognized for his work on infrared optical imaging in his paper titled, "Optical Passive Athermalization Using Schott Chalcogenide Glasses." Brett Sternfield, also of the University of Rochester, was recognized for his work on a machine vision imaging system in his paper titled, "190 Degree FFOV Fisheye for Autonomous Robots." Josh Walters of the University of Alabama in Huntsville was recognized for his project titled, "Non-Sequential Modeling of Multi-Aperture Lenslet Array Spectropolarimetic Imager."
Sidense announced that the United States District Court for the Northern District of California granted Sidense’s motion for summary judgment of non-infringement of all three Kilopass patents asserted in the lawsuit. The Court determined that no reasonable jury could find that Sidense infringed any claim of Kilopass’ asserted patents. Kilopass Technology says that it plans to appeal the summary judgment ruling. Kilopass’ decision to appeal rests in its conviction that Sidense’s products are infringing on Kilopass’ patents. The summary judgment order in this case relies on issues that are under dispute and, in Kilopass’ view, should be decided by a jury as a matter of right.
Cypress Semiconductor has introduced PSoC Creator™ 2.1, the Integrated Design Environment (IDE) for the PSoC® 3 and PSoC 5 programmable system-on-chip families. The new software update includes over 100 new features and enhancements, accelerating digital designs more than 80% on average, simplifying analog designs, and greatly improving ease of use. PSoC Creator allows users to configure PSoC programmable hardware into a custom one-chip solution. It includes a rich library of over 75 fully characterized analog and digital Components—“virtual chips,” represented by an icon—that users can drag-and-drop into a design and configure to suit a broad array of application requirements.
Mentor Graphics has filed another patent infringement suit against EVE in the U.S. Federal District Court for the District of Oregon. The suit alleges that EVE products violate Mentor Graphics’ patent rights under United States Patent No. 6,947,882, entitled “Regionally Time Multiplexed System” issued September 20, 2005, and seeks to recover damages and to bar the manufacture and sale of the infringing products.
Arteris has been ranked 496 on Inc Magazine’s 31st annual Inc. 500, an ranking of the nation's fastest-growing private companies. The list represents the most comprehensive look at this critical segment of the economy--America's independent entrepreneurs. The semiconductor design IP innovator joined other notable technology members including Facebook, Palo Alto Networks, and SugarSync to name a few. Companies such as Microsoft, Intuit, Vizio, Oracle, and many other well-known names gained early exposure as members of the Inc. 500.
Avery Design Systems announced availability of its SCSI-Xactor verification IP targeting SCSI Express for high performance PCIe-based SSDs. SCSI-Xactor extends Avery’s portfolio of storage-related VIP which also includes NVM Express, USB Attached SCSI (UASP), USB Mass Storage Class Bulk-Only Transport (BOT), MIPI Universal Flash Storage (UFS), and SATA. SCSI-Xactor is based on the standards work of INCITS T10's SOP-PQI Working group and the SCSI Trade Association. The protocol is based on the SCSI over PCIe (SOP) host interface specification which enables SCSI initiators communicating to SCSI targets over PCIe through the PQI transfer layer. This new protocol will enable SCSI devices to utilize the faster PCIe transport required to meet the demand in next generation enterprise designs.
Brian Bailey – keeping you covered
If you found this article to be of interest, visit EDA Designline where you will find the latest and greatest design, technology, product, and news articles with regard to all aspects of Electronic Design Automation (EDA).
Also, you can obtain a highlights update delivered directly to your inbox by signing up for the EDA Designline weekly newsletter – just Click Here to request this newsletter using the Manage Newsletters tab (if you aren't already a member you'll be asked to register, but it's free and painless so don't let that stop you).
Designers of micro server circuit boards based on the Intel® Atom™ processor now have a tool capable of non-intrusively validating the signal integrity on high-speed input/output (HSIO) and memory buses. The ScanWorks® platform for embedded instruments from ASSET® InterTech is a design validation tool for Intel Atom designs that does not rely on placing a physical probe on a bus to monitor its signal integrity. Because buses with speeds in excess of 5 gigabits per second (Gbps) become super-sensitive to capacitive coupling effects, the signaling on these buses is distorted when a physical probe is placed on them. To counteract this, Intel developed and is implementing an instrumentation technology that is embedded in its advanced chips. ASSET’s ScanWorks HSIO for Intel Architecture (IA) is the first and only non-intrusive software-based toolkit to take advantage of Intel’s embedded instrumentation technology.
Synopsys announces that University of Rochester students Anthony Visconti and Brett Sternfield and University of Alabama in Huntsville student Josh Walters are the winners of the 2012 Robert S. Hilbert Memorial Optical Design Competition. The competition was established in 2000 by Optical Research Associates (ORA®), now the Optical Solutions Group at Synopsys, and was named in honor of ORA's former president and chief executive officer Robert S. Hilbert. Anthony Visconti of the University of Rochester was recognized for his work on infrared optical imaging in his paper titled, "Optical Passive Athermalization Using Schott Chalcogenide Glasses." Brett Sternfield, also of the University of Rochester, was recognized for his work on a machine vision imaging system in his paper titled, "190 Degree FFOV Fisheye for Autonomous Robots." Josh Walters of the University of Alabama in Huntsville was recognized for his project titled, "Non-Sequential Modeling of Multi-Aperture Lenslet Array Spectropolarimetic Imager."
Sidense announced that the United States District Court for the Northern District of California granted Sidense’s motion for summary judgment of non-infringement of all three Kilopass patents asserted in the lawsuit. The Court determined that no reasonable jury could find that Sidense infringed any claim of Kilopass’ asserted patents. Kilopass Technology says that it plans to appeal the summary judgment ruling. Kilopass’ decision to appeal rests in its conviction that Sidense’s products are infringing on Kilopass’ patents. The summary judgment order in this case relies on issues that are under dispute and, in Kilopass’ view, should be decided by a jury as a matter of right.
Cypress Semiconductor has introduced PSoC Creator™ 2.1, the Integrated Design Environment (IDE) for the PSoC® 3 and PSoC 5 programmable system-on-chip families. The new software update includes over 100 new features and enhancements, accelerating digital designs more than 80% on average, simplifying analog designs, and greatly improving ease of use. PSoC Creator allows users to configure PSoC programmable hardware into a custom one-chip solution. It includes a rich library of over 75 fully characterized analog and digital Components—“virtual chips,” represented by an icon—that users can drag-and-drop into a design and configure to suit a broad array of application requirements.
Mentor Graphics has filed another patent infringement suit against EVE in the U.S. Federal District Court for the District of Oregon. The suit alleges that EVE products violate Mentor Graphics’ patent rights under United States Patent No. 6,947,882, entitled “Regionally Time Multiplexed System” issued September 20, 2005, and seeks to recover damages and to bar the manufacture and sale of the infringing products.
Arteris has been ranked 496 on Inc Magazine’s 31st annual Inc. 500, an ranking of the nation's fastest-growing private companies. The list represents the most comprehensive look at this critical segment of the economy--America's independent entrepreneurs. The semiconductor design IP innovator joined other notable technology members including Facebook, Palo Alto Networks, and SugarSync to name a few. Companies such as Microsoft, Intuit, Vizio, Oracle, and many other well-known names gained early exposure as members of the Inc. 500.
Avery Design Systems announced availability of its SCSI-Xactor verification IP targeting SCSI Express for high performance PCIe-based SSDs. SCSI-Xactor extends Avery’s portfolio of storage-related VIP which also includes NVM Express, USB Attached SCSI (UASP), USB Mass Storage Class Bulk-Only Transport (BOT), MIPI Universal Flash Storage (UFS), and SATA. SCSI-Xactor is based on the standards work of INCITS T10's SOP-PQI Working group and the SCSI Trade Association. The protocol is based on the SCSI over PCIe (SOP) host interface specification which enables SCSI initiators communicating to SCSI targets over PCIe through the PQI transfer layer. This new protocol will enable SCSI devices to utilize the faster PCIe transport required to meet the demand in next generation enterprise designs.
Brian Bailey – keeping you covered
If you found this article to be of interest, visit EDA Designline where you will find the latest and greatest design, technology, product, and news articles with regard to all aspects of Electronic Design Automation (EDA).
Also, you can obtain a highlights update delivered directly to your inbox by signing up for the EDA Designline weekly newsletter – just Click Here to request this newsletter using the Manage Newsletters tab (if you aren't already a member you'll be asked to register, but it's free and painless so don't let that stop you).
|
|
|
|
|
Navigate to related information