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Novel Microprocessor-based Physical Unclonable Function Demonstrated
Brian Bailey
10/10/2012 11:14 AM EDT
The Secure Embedded Systems (SES) lab in the Center for Embedded Systems for Critical Applications (CESCA) at Virginia Tech, has demonstrated a novel Physical Unclonable Function (PUF), implemented in a microprocessor. An on-chip PUF is an integrated structure that creates a chip-unique response. It can be used to uniquely distinguish one single chip among a large population of identical chips. PUFs are used for cryptographic key generation, and for authentication. Most of the existing PUF designs, however, consume a high amount of silicon resources and/or energy. This makes them less useful for embedded implementations.
Using overclocking techniques, Abhranil Maiti (PhD student at SES who graduated this Spring), was able to demonstrate the uniqueness of a single microprocessor chip by observing its failure points due to the overclocking. The advantage of the technique, which is non-destructive, is that it is driven using software, and that it makes use of an existing microprocessor. The technique was demonstrated on a LEON-3 processor configured in Xilinx Spartan FPGA, but it is generally applicable to other microprocessors for which clock scaling is available. The novel PUF will be presented at the 2012 International Conference on Field Programmable Logic and Applications.
More information can be found on their website, that documents their PUF efforts.
The paper discussed in this article can be found here.
Questions should be sent to Abhranil Maiti (abhranil@vt.edu) or Patrick Schaumont, Associate Professor, Bradley Department of ECE (schaum@vt.edu)
If you would like to have your research featured here, please send me an email and I will let you know if I think it is appropriate for this audience.
Brian Bailey – keeping you covered
If you found this article to be of interest, visit EDA Designline where you will find the latest and greatest design, technology, product, and news articles with regard to all aspects of Electronic Design Automation (EDA).
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Characterization of an ADD instruction for identical processors implemented in 5 different FPGA chips.
Using overclocking techniques, Abhranil Maiti (PhD student at SES who graduated this Spring), was able to demonstrate the uniqueness of a single microprocessor chip by observing its failure points due to the overclocking. The advantage of the technique, which is non-destructive, is that it is driven using software, and that it makes use of an existing microprocessor. The technique was demonstrated on a LEON-3 processor configured in Xilinx Spartan FPGA, but it is generally applicable to other microprocessors for which clock scaling is available. The novel PUF will be presented at the 2012 International Conference on Field Programmable Logic and Applications.
More information can be found on their website, that documents their PUF efforts.
The paper discussed in this article can be found here.
Questions should be sent to Abhranil Maiti (abhranil@vt.edu) or Patrick Schaumont, Associate Professor, Bradley Department of ECE (schaum@vt.edu)
If you would like to have your research featured here, please send me an email and I will let you know if I think it is appropriate for this audience.
Brian Bailey – keeping you covered
If you found this article to be of interest, visit EDA Designline where you will find the latest and greatest design, technology, product, and news articles with regard to all aspects of Electronic Design Automation (EDA).
Also, you can obtain a highlights update delivered directly to your inbox by signing up for the EDA Designline weekly newsletter – just Click Here to request this newsletter using the Manage Newsletters tab (if you aren't already a member you'll be asked to register, but it's free and painless so don't let that stop you).
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