TotalRecall - What an amazingly cool idea!

1/8/2007 1:17 PM EST

And my absolute "all-singing, all-dancing" prediction for 2007? Well, we all know that FPGAs are often used to prototype ASIC designs. The problem is visibility into the internal signals and memory locations inside the FPGA. Can you imagine an incredibly cunning new technology that would allow you to run your FPGA prototype at full hardware speeds while still providing 100 percent visibility into its internal signals (and also its registers and memory contents)? Trust me, this technology is coming our way, and sooner than you think.

Well, you can "tickle my toes with a mallet," because those clever folks at Synplicity have just announced an incredibly cunning technology called Total Recall (see the Announcement on the EE Times website and an in-depth How To Article on the Programmable Logic DesignLine website).

I tell you, I'm constantly amazed by the creativity of the guys and gals at Synplicity. It's as though they all sport turbo-charged size-16 brains with "go-faster" stripes painted on the side. They keep on coming up with amazingly cool ideas, such as their proposal for an Open IP Encryption Flow. But as far as I'm concerned, TotalRecall really "takes the biscuit."

This is one of those ideas that seem so incredibly obvious once you've seen it (but if it was so obvious, why didn't we all think about it before?). As soon as you wrap your brain around the TotalRecall concept you say to yourself: "But of course!" I actually think that this is going to revolutionize FPGA-based ASIC prototyping. In fact, I'll go out on a limb and say that – as far as I'm concerned – this could well be one of the most exciting developments of the year!

Questions? Comments? Feel free to email me – Clive "Max" Maxfield – at max@techbites.com). And, of course, if you haven't already done so, don't forget to Sign Up for our weekly Programmable Logic DesignLine Newsletter.