FPGA implementation of antique Friden EC-130 delay-line calculator

11/14/2007 5:22 PM EST

Costing a whopping $2,195 in 1963, the Friden EC-130 contained around 325 transistors, 650 diodes, and employed a magnetostrictive delay-line memory. Apparently Brian ran across one of these little rascals in 2004, just as he was about to take a break from work to commence a degree in computer engineering degree.

In 2007, with the blessing of his academic supervisor, Brian used his knowledge of the Friden EC-130 as a vehicle to learn VHDL – in four weeks he had a model that represented the spirit of the original machine. He then created a physical implementation of this model using a Xilinx Spartan-3 development kit.

Brian has recently started to document his adventure on this VintageCalc website. At the moment the site is somewhat sparsely populated with some cool photos. The interesting thing is that Brian contacted me through my DIYCalculator.com website asking if I would care to add a link to his site.

In his email, Brian mentioned that his website is still in progress, and that he will proceed according to the amount of interest shown. What he didn't realize is that – as the editor of Programable Logic DesignLine – my blog gets seen by countless FPGA designers (won't he be surprised – grin).

So, why don't we all visit Brian's site, and then send him an email of encouragement at brianecauchi@hotmail.com telling him that we would very much like him to add videos, design files, and other "goodies" pertaining to his calculator project.

Questions? Comments? Feel free to email me – Clive "Max" Maxfield – at max@techbites.com). And, of course, if you haven't already done so, don't forget to Sign Up for our weekly Programmable Logic DesignLine Newsletter.