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Charles.Desassure
I strongly agree, sounds like an excellent move from UMC's point-of-view. Hat's ...
peter.clarke
UMC looks for boost with IBM license deal
Dylan McGrath
6/29/2012 3:54 PM EDT
United Microelectronics Corp.'s announcement Friday (June 29) that it has licensed from IBM technology to expedite the development of its 20-nm process, including FinFET transistors, likely means that UMC will be the only pure-play foundry to offer FinFETs at the 20-nm node.
The effort appears to be an attempt by UMC to stem the tide of recent years. Rival Taiwan Semiconductor Manufacturing Co. (TSMC) has widened the technology gap with UMC as of late, and Globalfoundries Inc. recently surpassed UMC to claim the No. 2 position in foundry sales.
Both TSMC and Globalfoundries are currently planning to introduce FinFETs—three-dimensional, fin-based multi-gate transistors—at the 14-nm node in 2014 or 2015. Some advanced foundry customers, including Nvidia Corp., have said they would like the foundries to offer FinFETs earlier. There is some speculation that TSMC and Globalfoundries may alter their roadmaps to incorporate FinFETs earlier.
A spokesman for Globalfoundries said Friday that the company has been evaluating a fully depleted silicon-on-insulator technology offering in 2013 for early-adopter customers who may benefit from an additional performance boost. "We are in close discussion with leading customers to make sure this technology is the most optimum solution in terms of cost, ease of design, scaling and risk," the spokesman said.
Intel Corp. is already producing chips with FinFETs—or what Intel calls tri-gate transistors—at the 22-nm node. Leading-edge fabless firms want the power consumption improvement promised by the technology. (Intel has publicly disclosed that it is making chips for a handful of smaller companies using its 22-nm 3-D process. Rumor has it that it is working on a foundry basis for several other companies, as well, including some fairly sizeable fabless chip vendors).
The incorporation of FinFETs at 20-nm will enable UMC to offer a low-power version of its 20-nm process, in addition to a standard planar 20-nm process. Neither TSMC or Globalfoundries is planning to have a low-power 20-nm process. In April, Shang-yi Chiang, executive vice president and co-chief operating officer at TSMC, said critical dimensions are so tight at 20-nm that there isn't enough room for tweaking design rules to specify different gate lengths to enable different flavors of 20-nm processes.
If UMC is able to offer a 20-nm low-power process with FinFETs in a timely fashion, it could be a major differentiator. It could be just what the company needs to recapture some of the ground it has given up to competitors in recent years.
Everyone understands that power consumption is an issue of paramount concern to chip makers and just about everyone else in electronics today. How big of a deal will it be if UMC can offer a low-power 20-nm process with FinFETs at a time when competitors do not?
Mark Bohr, the Senior Fellow at Intel who oversees the company's process technology development, reacted to the news that TSMC would not offer a low-power process at 20-nm by declaring to EE Times in April that the foundry model was "collapsing." Bohr's comments were self-serving and likely a little over the top. But his central point, that fabless chip vendors like Qualcomm Inc. need a process that will make its chips consume as little power as possible, has some merit.
Of course, it should be said here that UMC's plan to offer FinFETs at 20-nm is, at this point, just a plan. Even with the IBM technology, there is no guarantee that devleoping the new process will go out without a hitch. And UMC itself has offered no timetable for when this technology will be available to customers.
But if all goes according to plan, the move could well be enough to put UMC back in a place of greater relevance to leading edge foundry customers.
Related stories:
The effort appears to be an attempt by UMC to stem the tide of recent years. Rival Taiwan Semiconductor Manufacturing Co. (TSMC) has widened the technology gap with UMC as of late, and Globalfoundries Inc. recently surpassed UMC to claim the No. 2 position in foundry sales.
Both TSMC and Globalfoundries are currently planning to introduce FinFETs—three-dimensional, fin-based multi-gate transistors—at the 14-nm node in 2014 or 2015. Some advanced foundry customers, including Nvidia Corp., have said they would like the foundries to offer FinFETs earlier. There is some speculation that TSMC and Globalfoundries may alter their roadmaps to incorporate FinFETs earlier.
A spokesman for Globalfoundries said Friday that the company has been evaluating a fully depleted silicon-on-insulator technology offering in 2013 for early-adopter customers who may benefit from an additional performance boost. "We are in close discussion with leading customers to make sure this technology is the most optimum solution in terms of cost, ease of design, scaling and risk," the spokesman said.
Intel Corp. is already producing chips with FinFETs—or what Intel calls tri-gate transistors—at the 22-nm node. Leading-edge fabless firms want the power consumption improvement promised by the technology. (Intel has publicly disclosed that it is making chips for a handful of smaller companies using its 22-nm 3-D process. Rumor has it that it is working on a foundry basis for several other companies, as well, including some fairly sizeable fabless chip vendors).
The incorporation of FinFETs at 20-nm will enable UMC to offer a low-power version of its 20-nm process, in addition to a standard planar 20-nm process. Neither TSMC or Globalfoundries is planning to have a low-power 20-nm process. In April, Shang-yi Chiang, executive vice president and co-chief operating officer at TSMC, said critical dimensions are so tight at 20-nm that there isn't enough room for tweaking design rules to specify different gate lengths to enable different flavors of 20-nm processes.
If UMC is able to offer a 20-nm low-power process with FinFETs in a timely fashion, it could be a major differentiator. It could be just what the company needs to recapture some of the ground it has given up to competitors in recent years.
Everyone understands that power consumption is an issue of paramount concern to chip makers and just about everyone else in electronics today. How big of a deal will it be if UMC can offer a low-power 20-nm process with FinFETs at a time when competitors do not?
Mark Bohr, the Senior Fellow at Intel who oversees the company's process technology development, reacted to the news that TSMC would not offer a low-power process at 20-nm by declaring to EE Times in April that the foundry model was "collapsing." Bohr's comments were self-serving and likely a little over the top. But his central point, that fabless chip vendors like Qualcomm Inc. need a process that will make its chips consume as little power as possible, has some merit.
Of course, it should be said here that UMC's plan to offer FinFETs at 20-nm is, at this point, just a plan. Even with the IBM technology, there is no guarantee that devleoping the new process will go out without a hitch. And UMC itself has offered no timetable for when this technology will be available to customers.
But if all goes according to plan, the move could well be enough to put UMC back in a place of greater relevance to leading edge foundry customers.
Related stories:
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Robotics Developer
6/30/2012 6:03 PM EDT
Sounds like a good move on UMC's part, but only if they can capitalize on this by rolling out silicon proof chips and provide customers with working process parameters for designing. I wonder what the cost in manpower will be to transfer the technology and bring it on-line?
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peter.clarke
7/4/2012 11:07 AM EDT
Looks like UMC got its boost.
Could be that the scramble to get the IBM 20-nm process with FinFETs has been done at the behest of Qualcomm who wanted to see a roadmap they liked.
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Charles.Desassure
7/8/2012 3:04 PM EDT
I strongly agree, sounds like an excellent move from UMC's point-of-view. Hat's off to the management team.
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