Cutting RF power in W-CDMA phones

The spread-spectrum wireless com-munications standard, IS-95/3GPP, embodies stringent specifications for linearity and adjacent-channel power ratio (ACPR). To meet them, wideband-code-division multiple access (W-CDMA) wireless handsets require highly linear Class A or Class A-B RF power amplifiers. The power-added efficiency (PAE) for that type of PA, however, is only about 35 percent maximum at an output power of +28 dBm; for lower power levels, it is much lower than that.

The power amplifier does not operate continuously in voice mode. When the phone user isn't speaking, it runs at a half rate (50 percent of the time) or at a one-eighth rate, so there's no worry about the phone's heating during voice mode. But in data mode the PA runs continuously until the data transmission is complete. Combining the PA's low efficiency and continuous operation causes the battery to drain quickly, and the resulting internal power dissipation may also make the phone too hot.

Power dissipation was a major problem for early W-CDMA handsets that supported high-speed data transmission services. It obliged designers to include larger heat sinks, more airflow for cooling and bigger batteries. Fortunately, in the past few years this problem has been alleviated by a dramatic improvement in PA efficiency for CDMA and W-CDMA cell phones.

In CDMA and W-CDMA systems, the power amplifier's RF power output is not always maximum. To optimize the cell capacity (number of simultaneous transmissions that a basestation can handle), each mobile phone controls its RF output power so that the effective signal-to-noise level received at the base-station is the same for each phone.

A probability distribution of the RF output-power levels from many phones in a given area shows that the average output power from a typical CDMA or W-CDMA phone is about +10 dBm for suburban conditions and about +5 dBm for urban conditions. Thus, a useful target for improving power amplifier efficiency is not the maximum power level, but an approximate range of +5 dBm to +10 dBm.

Two supply voltages are required for the CDMA and W-CDMA power amplifier (see figure). VREF provides bias for the internal driver and power-amplifier stages, and VCC biases the collectors for the driver and power amplifiers. We can reduce the power amplifier supply current by adjusting those two voltages.

When transmitting zero RF power, the PA itself draws a typical quiescent current of 100 mA at VREF equal to 3 V and VCC equal to 3.4 V. Reducing VREF from 3 V to 2.9 V causes the quiescent current to drop about 20 mA.

Thus, designers can achieve a dramatic saving in PA quiescent current by lowering VREF, but not below the point at which the PA linearity and adjacent channel power ratio begin to fail their specifications.

Reducing VREF and VCC
If we have experimental data giving the minimum VREF voltage required to support each output-power level slotted for the power amplifier, we can actively couple the control of VREF with the amp's power-control process. If that approach is too difficult, we can simply implement a two-step change in VREF that corresponds to the low-power mode (less than 10 dBm) and high-power mode (greater than 10 dBm).

To adjust VREF via the baseband control D/A converter, we use a low-power op amp with high output-current capability, along with an external gain setting.

In typical wireless handsets, the PA VCC is delivered directly from a single-cell lithium-ion battery, resulting in an operating VCC range of 3.2 V to 4.2 V. As stated above, statistics show that the CDMA and W-CDMA power amplifier operates at power levels of +5 to +10 dBm most of the time.

At those levels, we can reduce the power amplifier VCC considerably without losing linearity in the power amp and at the same time reduce the power loss from excessive collector-bias headroom.

Based on experimental tests at low power levels, we can maintain proper communications with the basestation while lowering the power amp collector bias all the way down to 0.6 V.

A variable bias voltage for the power amplifier collector is provided by a specially designed, high-efficiency dc/dc step-down converter.

We adjust the output voltage of this converter using a dedicated digital-to-analog output from the baseband processor.

The dc/dc converter controlling the power amplifier collector voltage must respond quickly to a control signal. Usually, the converter's output voltage should settle to within 90 percent of its new target voltage within 30 microseconds following a change in analog control voltage from the baseband processor.

The converter chip provides an appropriate internal gain between its VCC-control input and the output voltage that biases the PA collector. It also switches at high frequency to reduce the physical size of the inductor.

Connecting the dc/dc converter between PA and battery highlights a problem: the demand for high RF power at low battery voltage. To deliver +28-dBm RF power while maintaining the specification for PA linearity, manufacturers recommend a minimum VCC of 3.4 V. To maintain a 35-percent PAE at 3.4 V, we also need a high PA-collector current of 530 mA:

+28 dBm RF power: 102.8 mW = 631 mW.

Required PA power (VCC x ICC): 631 mW/(PAE/100) = 1,803 mW.

Required PA ICC at 3.4 V VCC: ICC = 1,803 mW/3.4 V = 530 mA.

To support a 3.4-V VCC and 530-mA ICC, the dc/dc converter for PA power requires a certain amount of input-to-output headroom.

If, for example, on-resistance for the converter's internal p-channel MOSFET (PFET) is 0.4 ohm and the inductor resistance is 0.1 ohm, the voltage drop across those two components in series will be (0.4 ohm + 0.1 ohm) x 530 mA = 265 mV. Thus, the dc/dc converter is unable to support a 3.4 V output when the battery voltage drops below 3.665 V.

In this case (battery voltage less than 3.665 V), it's better to short the PA collector to the battery. Otherwise, we cannot access the full capacity of the Li-ion battery.

Normally, the solution is to bypass the inductor and internal PFET by connecting a low-Rds(on) PFET in parallel. This bypass PFET (which can be internal or external) connects battery voltage directly to the PA collector when in the high-power mode. For the combination of high RF power and low battery voltage, this bypass measure is a must-do.

Optimizing PAE
The very best method for optimizing PAE is to adjust the PA-collector bias continuously. That approach, however, requires a factory calibration and sophisticated software that ensures good PA linearity and ACPR in the presence of continuously changing collector bias. The next best approach is to change the bias level in steps, usually two to four.

A four-step system, for instance, might consist of VCC values Vbatt, 1.5 V, 1 V and 0.6 V. The overall efficiency in such a system is nearly as good as that for a system with continuous control of the PA collector bias, and for low- and mid-power levels the inductor needs only to support peak currents of less than 150 mA.

Jay Kim (jay_kim@maximhq.com) is a corporate application engineer at Maxim Integrated Products Inc. (Sunnyvale, Calif.).

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