Synopsys claims enhanced tool can speed verification by up to 5X

SAN FRANCISCO — Synopsys Inc. said Tuesday (May 31) that new capabilities added to its VCS register-transfer level (RTL) product can improve verification speed by up to five times.

The VCS 2005.06 release includes the new VCS assertion intellectual property (IP) library, which includes protocol checkers for industry standards such as AMBA 2 AHB/APB protocols and PCI interfaces, Synopsys (Mountain View, Calif.) said. The VCS solution also extends Synopsys' native testbench technology, the company said, to incorporate a full-featured SystemVerilog testbench solution and also delivers native SystemC language simulation.

In a statement issued by the company Tuesday, Manoj Gandhi, senior vice president and general manager of Synopsys' Verification group, said customers have been asking for verification technology that combines easy-to-use assertion and verification IP with support for industry standards. "The latest [VCS] release now combines our proven, native testbench and assertion-based verification technology with SystemVerilog and SystemC languages to deliver higher verification throughput with the flexibility provided by open standards," Gandhi said.

Synopsys said VCS 2005.06 would be available in the third quarter. Pricing information was not disclosed.