At the event, Intel re-announced its roadmap of dual-core mobile, desktop and server processors at the 65-nm node. The company also claimed that it will have no less than four wafer fabs in its arsenal that will manufacturer chips based on the 65-nm process.

And within those plants, the chip giant has quietly deployed several technologies to enable what it calls “Intelligent Fab Automation.” This technology is said to reduce fab costs and cycle times, while also giving the chip giant a competitive edge over its rivals, namely Advanced Micro Devices Inc. (AMD).

Included in Intel’s fab efforts is a next-generation manufacturing execution system (MES), which provides wafer-level information on the fly, adaptive defect metrology sampling, automated yield prediction and optimization, among other functions.

Intel, in fact, has already implemented what it calls Level 8 automation to its 90-nm fabs, with plans to deploy the same technology within its 65-nm plants. According to Intel, the Level 8 designation means that a wafer fab is fully automated, including everything from the tool and materials handling functions to the data automation systems.

Level 8 could be the closest thing to the long-awaited but dreaded “lights out fab,” which implies that humans are no longer needed in a fab to operate or handle the tools or other manufacturing functions.

“ ‘Lights out’ is a buzzword,” said Chandra Mouli, director of fab automation architecture for Intel’s Logic Technology Development unit, in an interview. “We don’t like to use that word. It’s a misnomer. You still need humans in a fab to fix and maintain the systems.”

Intel’s “Intelligent Fab Automation” technology does in fact save costs, but Mouli declined to elaborate. There are several separate components that make up Intel’s “Intelligent Fab Automation,” including the MES system, advanced process control (APC), materials handling, tool control, engineering analysis framework, among others.

Linking these various components together is the so-called “Workflow Automation Grid,” which is a proprietary and patent pending software tool that provides intelligent routing, sequencing, and adaptive workflow within the fab, Mouli said.

Within the MES system itself, Intel has deployed wafer-level processing on the fly. For example, in legacy MES systems, a typical process flow with three product types could require three separate wafer handling systems and tools in fab production.

In Intel’s new MES system, the company has reduced that process flow down from three to one wafer handling system and a single tool, according to the Intel.

Like most chip makers with fabs, Intel has been using APC to control and operate its tools within the plants. Within the APC umbrella, the company implements several technologies to boost its overall yields, including adaptive defect metrology sampling.

This technology provides critical feedback on its metrology tools, enabling an 83 percent reduction on lots sampled and an 88 percent reduction in wafers sampled, according to Intel.

Intel also implements “smart defect sampling” in the flow, which automates the company’s yield prediction and optimization efforts. It also has a yield analysis engine, which detects defects and isolates defective material that is processed across a combination of 10 fabs and 5-to-6 assembly sites.

"Intelligent Fab Automation enables our manufacturing leadership," concluded the Intel technologist.