Interoperability test lifts Serial RapidIO

Dallas -- The Serial RapidIO (SRIO) interface got a boost last week at the Texas Instruments Developers Conference, held here, with the announcement of an interoperability lab and the successful completion of the first round of tests. Those trials used devices from Freescale, TI, Xilinx and Tundra.

TI also announced a developer's kit and evaluation module based on its SRIO-enabled C6455 DSP.

The new interoperability test facility, called RIOlab, is based at Tundra Semiconductor Corp. facilities in Ottawa, Ontario. It will eventually be spun out as a third-party-owned independent lab.

The parallel version of RapidIO ap- peared in 1999, with Serial RapidIO following in 2002 for 10-Gbit/second point-to-point full-duplex communications. The tests were completed in accordance with SRIO version 1.3, which was developed last year.

Since its emergence, Serial RapidIO has had to fend off not only the omnipresent Ethernet specification but also the Ad- vanced Switching standard put forth by Intel. With the completion of interoperability tests, and a rising number of products, software and development kits, SRIO's time has come, its proponents believe.

"We've completed first-level interoperability testing of control path functionality as well as data path functionality," said Tom Cox, executive director of the RapidIO Trade Association. "We are shipping systems based on the products seen here," he added, referring to the devices used in the tests.

The device list comprises Tundra's Tsi 56x/Tsi 57x backplane SRIO switches, TI's C6455 digital signal processor, Xilinx Inc.'s Virtex II Pro and Virtex 4FX physical-layer FPGAs, and Freescale Semiconductor Inc.'s PowerQuicc III processor line. Mercury Computer used the Developers Conference to show its Ensemble II, a full SRIO-enabled system.

The interoperability tests were essential to ensure proper "diffusion" of products into the market, said Danny Petkevich, TI's C6000 product-marketing manager. All specs, of course, can be misinterpreted, and Serial RapidIO is no exception. While there were reportedly no major hitches, Petkevich pointed to simple issues that he said would've caused big problems for SRIO system developers.

"Whatever you do on SRIO will now work with Freescale silicon," said Greg Shippen, system architect at Freescale Semiconductor's Networking and Computing Systems Group (Austin, Texas).

Don't bet against Ethernet
While the interoperability tests are indeed a milestone for SRIO, success isn't assured in the embedded market, particularly in the face of Ethernet's continued evolution and the weight of Intel's influence behind the Advanced Switching architecture.

"I like what SRIO is doing," said Ernie Bergstrom, founder of analysis firm Crystal Cube Consulting (Camano, Wash.). "They have the high-end embedded and also have an interface to PCIExpress."

Backward compatibility to the PC-centric PCIExpress is considered essential, even though SRIO and Advanced Switching are aimed at embedded. "[Intel] says they have a seamless solution, as they don't want Advanced Switching and PCIExpress to look like two separate products, but it's just not there yet," Bergstrom said. And Advanced Switching "is still not ready to be released to support manufacturers,' he said. "It's supposed to roll out in 2006, but Intel has been very quiet."

On the other hand, Ethernet is everywhere. "Ethernet is so well-populated, I wouldn't ever bet against it," Bergstrom said, referring to that spec's history of regularly advancing in 10x increments. Nonetheless, Ethernet is founded on a contention-based media access approach and as such still faces delay and data integrity issues, as well as questions regarding its ability to quickly scale to 10 Gbits/s.