News & Analysis

Terahertz clock rides rotary wave

Rick Merritt

5/8/2006 9:00 AM EDT

Scotts Valley, Calif. -- A 12-person company has disclosed a novel approach to semiconductor clocking that could slash power budgets and open the door to chips that clock at terahertz rates.

Startup MultiGig Inc. will deliver a handful of ambitious analog and mixed-signal products later this year using its Rotary Traveling Wave Oscillator clocking scheme. But the company faces multiple hurdles en route to its broader aim of replacing existing clock technology approaches used on most digital chips.

Rather than use traditional tank or ring oscillators and clock trees or grids, MultiGig (Scotts Valley, Calif.) es- sentially sends a pulse around differential transmission lines that are twisted back on themselves like a Mobius loop. The looped transmission lines are im- plemented in the metal interconnect layers on the chip and do not require any critical lithography or processing steps, so the manufacturing cost increase is kept to a minimum, ob- served Haris Basit, chief operating officer of MultiGig.

Paired back-to-back inverters sprinkled around the loop keep the pulse strength constant, like hands spinning a wheel. The length of the path defines the period. For example, for a 6-GHz rotary wave ring in 180-nanometer CMOS, the physical area for a ring is 0.35 mm2.

"It's almost like a perpetual-motion machine; you start it up, and it keeps on going," said Stephan Ohr, analog analyst for Gartner Dataquest (San Jose, Calif.). The Rotating Wave technology consumes a small fraction of the power used by traditional clocking schemes, thus making it seem as if it sustains itself, Ohr said.

The technology holds the promise of slashing the dynamic power needed to drive a microprocessor's clock by up to 80 percent, according to MultiGig. Basit noted that a gigahertz-class, 1.2-volt CPU made in 130-nm technology can dissipate as much as 18 watts just on clocking functions.

On its first analog-to-digital converter, MultiGig will implement one physical ring with four phases. Taps can be implemented at any point around the ring to gain access to any of the four phases.

"We have done as many as 512 phase taps off a single clock, and they are very accurate," said Basit. "So we know we can get down to subpicosecond phases and effectively clock circuits at terahertz rates for use in very high-speed digital and mixed-signal products, such as A/D and D/A converters." The technology could drive next-generation serial I/O and radar systems, and it has attracted interest from the U.S. government for potential application in supercomputers, according to the company.

MultiGig has fabricated test chips in CMOS, bipolar and silicon-on-insulator processes and simulated devices in gallium arsenide, using foundries such as Jazz Semiconductor (Newport Beach, Calif.). "The fundamentals of this technology have been well-established and measured," said Basit, who has conducted and managed research projects at IBM Research, Bell Labs, Rockwell and the Defense Advanced Research Projects Agency.

Rewriting the rules
"This clocking technology lets you rethink how you design many circuits, providing a whole new rule book," Basit added. Yet the novelty also represents one of the hurdles of the approach.

"It's dazzling technology," said Ohr of Gartner Dataquest, and it could have a long-term impact on the clock market, which Gartner pegs at $1 billion a year and rising, particularly when extras like intellectual property and related tools are added to the mix. The question, Ohr said, is, "How do you implement it?

"This forces designers to do something different, and there is always resistance to that. You will have to force engineers to design this into their chips. That will take time to catch on"--at least a couple of years before the technique appears in digital silicon, Ohr estimated.

For example, while the rotary wave oscillator is expected to use no more silicon area than traditional clocks and may use less, it requires new thinking about chip layout. "It's like setting up a racetrack on the outer edge of a chip," said Ohr.

In digital applications, about 15 percent of each of the top two metal layers would be utilized by the MultiGig clock, but less wire could be used for the power distribution, said Basit. "We expect that for most digital applications, the area impact is neutral," he said.


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