Future of chip design revealed at ISPD

'Best Paper' award
Markov and Bertacco were given the "Best Paper" award by a steering committee that included industry experts from Cadence, IBM, Intel and Magma. According to the steering committee, Markov and Bertacco combined logic- and physical-synthesis in a novel new way that provided a concrete example of how logic synthesis was alive and well.

"One of the nice elements of this work is that it's a useful integration of two different domains," said steering committee chair, Professor Patrick Madden, SUNY, Binghamton. "They have merged a couple of tasks that would normally be viewed as independent, and shown that this can give a significant benefit."

The ISPD program chair, IBM Austin Research Laboratory (Texas) researcher Gi-Joon Nam, also concurred that melding logic- and physical-synthesis is the wave of the future in chip-design practices.

"Normally, lots of efforts are made during the back end of physical synthesis flow to clean up timing violations," said Nam. "Markov [and Bertacco] avoid this issue with a simulation-based method instead of thorough BDD [binary decision diagram] equivalence checking. The bottom line is that they have bridged the gap between logic synthesis and physical synthesis."

Another paper of note, according to general chair David Pan, an EE Professor at the University of Texas (Austin), was one showing how to create ultra-high-speed on-chip interconnects using radio frequency (RF) transmission lines. This was presented by Professors Frank Chang and Jason Cong of the University of California at Los Angeles (UCLA). In this interconnect scheme, data is transmitted by modulating an electromagnetic wave along an RF transmission line that can be implemented using standard CMOS processing steps.

"Its advantages compared with conventional wiring include low-latency, low-power and reconfigurability" said Pan. "If RF interconnect becomes mainstream, this technique will solve many physical-design problems."

Pan and Nam were also instrumental in creating a suite of 16 routing benchmarks used to judge this year's ISPD "Global Routing Contest." Eleven entries were received this year from four countries. Four each were received from the U.S. and Taiwan, two from Hong Kong and one from Germany. Two awards were given for first and second places, both of which went to Taiwanese researchers.

"The important thing to me," said Nam, "is that every team made significant improvements over the entries from last year. Not only were they able to achieve better quality results, in terms of less overflow and better wirelengths, but the runtime of these global routers improved noticeably--up to 10-times better than last year."