Memristors ready for prime time

HP Labs devised a solution for performing a detailed characterization of the interface between each layer of a memristor: laying out its experimental device horizontally on the chip instead of vertically. "We used single-crystal titanium oxide to build the memristor into a lateral device, instead of a vertical device," said HP Labs researcher, Jianhua (Josh) Yang. "In that way, we can now test the two interfaces separately, and identify which was responsible for the memristor's behavior."

HP Labs fabricated horizontal devices in several configurations to fully characterize memristor behavior. Horizontal devices also allowed them to measure the electrical properties of each layer in different orders, thereby creating a knowledge base for building memristor-based CMOS semiconductors. "Now we know how to engineer new devices so that we get the behaviors that we want," said Yang. "For instance, if we want a positive voltage to turn the memristor off, then we want the titanium oxide layer with vacancies on the top layer. But if you want a positive voltage to turn the memristor on, then you need the layers reversed."

HP Labs is currently working on its first prototype chips to demonstrate working circuit functions that researchers expect to complete by next year. "With engineering control, we can now build a device that delivers a specific electrical performance," said Yang. "Only with engineering control do you get to a point where you can build large integrated circuits."

HP Labs' prototype chips will be for RRAMs that use its crossbar architecture. Metal lines spaced less than 50-nm apart will serve as the bottom electrodes with the top electrodes patterned from metal lines arranged perpendicular to the bottom lines into a crossbar switch. In between the metal lines, engineers plan to sandwich twin layers of titanium dioxide--one doped with oxygen vacancies and the other undoped. Running current between two metal lines--one on the top and one on the bottom--the device will be able to address individual bit cells, changing their resistance and thus turning bits on and off.

"We are currently building real circuits, with our near- term target the nonvolatile random-access memory market where there is lots of potential," said Stewart.

HP Labs plans to unveil RRAM prototype chips based on memristors with crossbar arrays in 2009.

It will also use a similar crossbar architecture to harness precise resistance change in an analog circuit. HP Labs claims that massive memristor arrays with tunable resistance at each crossbar could enable brain-like learning. In the brain, a synapse is strengthened whenever current flows through it, similar to the way resistance is lowered by flowing current through a memristor. Such neural networks could learn to adapt by allowing current to flow in either direction as needed.

"RRAMs are our near term goal, but our second target for memristors, in the long term, is to transform computing by building adaptive control circuits that learn," said Stewart. "Analog circuits using electronic synapses will require at least five more years of research."

They estimate that it will take five years to produce the first analog memristor prototypes, with commercial applications about a decade out.