TSMC moves 40-nm to mass production

The silicon foundry giant appears to have taken the process lead over its rivals, including Chartered, IBM, Samsung, SMIC, UMC, among others. Many of TSMC's rivals have announced 45-/40-nm processes, but those companies do not appear to be in volume production.

In March, TSMC (Hsinchu, Taiwan) originally announced the 40-nm foundry process for leading-edge designs. As reported, the 40-nm process employs 193-nm immersion lithography, ultra low-k material and a low-power, triple-gate oxide option.

When TSMC announced the process, the overall IC market was relatively healthy and business looked strong for the foreseeable future. But beginning in September, the chip sector entered into a new and possibly steep downturn, thanks in part to the economic crisis and credit crunch.

The economic storm has caused a ripple effect in the market. Consumer spending has dropped, causing OEMs in most sectors to lower their forecasts. This, in turn, has prompted many chip makers to cut their estimates, which, of course, impacts the foundries.

Silicon foundries are experiencing a significant decline in wafer starts that is likely to result in sub-75 percent capacity utilization rates in the fourth quarter, according to HSBC Global Technology Research in Hong Kong.

The foundries reported lackluster results in the third period and warned about a slowdown in the fourth quarter. Heading into 2009, it is expected to be tough sledding for the foundry sector.

TSMC's ''management expects the semiconductor industry to be flat year-over-year in 2008, with TSMC outperforming'' the other players, said Steven Pelayo, an analyst with HSBC, in a recent report.

For 2009, TSMC expects the semiconductor industry to decline from ''mid-to-high single digits,'' he said. ''Near-term, management expects excess inventories at chip makers to linger into 1Q '09 and limit the speed of the recovery.''