The silicon foundry giant appears to have taken the process lead over its rivals, including Chartered, IBM, Samsung, SMIC, UMC, among others. Many of TSMC's rivals have announced 45-/40-nm processes, but those companies do not appear to be in volume production.

In March, TSMC (Hsinchu, Taiwan) originally announced the 40-nm foundry process for leading-edge designs. As reported, the 40-nm process employs 193-nm immersion lithography, ultra low-k material and a low-power, triple-gate oxide option.

When TSMC announced the process, the overall IC market was relatively healthy and business looked strong for the foreseeable future. But beginning in September, the chip sector entered into a new and possibly steep downturn, thanks in part to the economic crisis and credit crunch.

The economic storm has caused a ripple effect in the market. Consumer spending has dropped, causing OEMs in most sectors to lower their forecasts. This, in turn, has prompted many chip makers to cut their estimates, which, of course, impacts the foundries.

Silicon foundries are experiencing a significant decline in wafer starts that is likely to result in sub-75 percent capacity utilization rates in the fourth quarter, according to HSBC Global Technology Research in Hong Kong.

The foundries reported lackluster results in the third period and warned about a slowdown in the fourth quarter. Heading into 2009, it is expected to be tough sledding for the foundry sector.

TSMC's ''management expects the semiconductor industry to be flat year-over-year in 2008, with TSMC outperforming'' the other players, said Steven Pelayo, an analyst with HSBC, in a recent report.

For 2009, TSMC expects the semiconductor industry to decline from ''mid-to-high single digits,'' he said. ''Near-term, management expects excess inventories at chip makers to linger into 1Q '09 and limit the speed of the recovery.'' 40-nm is ready!
Despite the market conditions, TSMC's message is clear: The company is ready for the 40-nm era, enabling a new class of designs. ''40-nm will help the semiconductor industry and related technology-driven markets to innovate out the current downturn,'' said Di Ma, TSMC's vice president of field technical support.

At present, there are two schools of thought about the IC downturn. On one hand, the slowdown could delay the ramp of new technologies, including the 40-nm era.

On the other hand, the leaders will continue to innovate, Ma said. "During downturns in the past, some companies move faster,'' he said.

TSMC claims that several companies have jumped on its 40-nm process, such as Altera, AMD, Broadcom, LSI, Marvell, Nvidia, NXP, ST and Sun. At 40-nm, TSMC offers several derivatives, including general purpose (40G) and low-power (40LP) versions.

The 40G process targets performance-driven applications, including processors, graphics chips, networking devices, field programmable gate arrays (FPGA), storage ICs and others. The 40LP process targets low-power applications, including cellular baseband, application processors, portable consumer and wireless connectivity devices.

TSMC's 40G and 40LP processes passed process qualification, reaching ''first wafers out'' status as planned and completed product qualification in October. Both processes offer mixed-signal and RF options, along with embedded memory.

Besides 40-nm, TSMC is leading in other processes. In September, the company rolled out its 32- and 28-nm processes. The 32-nm process is a cost-down version of its 40-nm technology, while 28-nm is considered by TSMC as a ''full-node'' offering.

At 28-nm, TSMC plans to offer two separate options for the gate stack: conventional silicon oxynitride (SiON) and a high-k/metal-gate technology. But at 32-nm, the company will only offer a SiON for the gate stack

Recently, TSMC also appeared to have taken a slight lead in the high-voltage foundry market. The silicon foundry giant has enhanced its 0.13-micron process with the availability of a 1.5-, 6- and 32-Volt technology.