The problems rise in tandem with a slate of new high-speed serial system interfaces. Engineers are now implementing 5 GHz PCI Express 2.0, 6 GHz Serial ATA and Serial-Attached SCSI and USB 3.0 which aims to deliver up to 8 Gbits/s.

"We've lost our [signaling] headroom," said Tom Waschura, founder and chief technology officer of Synthesis Research Inc. (Menlo Park, Calif.), maker of the Bertscope. "If you sit on some of the telephone conference calls for these standards bodies you will hear them fighting over every inch of dB," he added.

The I/O Buffer Information Specification (IBIS) group defined a standard applications programming interface more than a year ago to provide engineers data needed to handle tight signaling budgets. The so-called Bird API lets vendors of transceivers and testers report details of their chips and equipment without giving away proprietary information.

"The current challenge is getting [the API] supported," said Xiaoxiong Gu, an I/O subsystem researcher at IBM's T. J. Watson Center. "Unfortunately the serdes models are not often available and support is spotty at best," he said.

An engineer from Freescale in the audience highlighted the industry paranoia that has slowed adoption of the standard. "Why do I have to specify my intellectual property, why can't I just tell you what comes in and out," he asked.

Channel wars: the debate over de-embedding
Taking another approach to the problem, test equipment vendors are beginning to support ways to put in or take out of a signal the noise characteristics of channels such as a few inches of FR4 print circuit board traces. However the so-called embed and de-embed features are not always affective or implemented in a common way.

In addition, different de-embedding methods have different impacts and sometimes they introduce new signal integrity problems, said Eric Kvamme, a principal serdes engineer at LSI Corp. He showed examples of signal disturbances left after the impact of a coaxial cable was inserted then removed as a signal transport.

Signal budgets are so tight that even placing a test probe on a design can create significant noise, something the de-embed feature is well suited to address, said Martin Miller, chief scientist of LeCroy (Chestnut Ridge, NY)

"As soon as you put a probe or fixture at the end of a channel you are screwing up a measurement," Miller said. "Life was simple at 1 Gbit/s, but that's not true anymore," he added.

"De-embedding is in its infancy," said Karl Kachigan, a marketing specialist with Agilent Technologies. "Right now de-embedding is a finely tuned Italian racing machine, and it's easy for it to break down," he added

"Aren't Ferrari's cheaper than your de-embedding tools," joked Ransom Stephens, a consultant who helped moderate the panel.

Panelists generally agreed they expect to see stepwise progress. It's not yet clear, for example, if the new technique could be applied to addressing the impact of switches or the fact that the characteristics of FR4 boards can vary with temperature and humidity.

"This will be like peeling an onion, one layer at a time," said Pavel Zivny, a senior product engineer with Tektronix.

Fingerpointing between chip, system and test engineers when a design does not work is not helpful, Zivny said. All sides agreed more experience and collaboration with the signal integrity issues is the most promising path to new work arounds and better interoperability.

"We're putting a lot of smarts into the chips, and if we don't agree on a bare minimum language on channel modulation and demodulation there will be no interoperability and no open eyes," said Mark Marlett, a senior serdes engineer at Xilinx.

"We're trying to outwit physics, but we have to face certain realities," said Kachigan of Aglient. "It's important to realize what the limit of the techniques will be," he said.