Signal integrity issues dog high-speed design

SANTA CLARA, Calif. — Engineers are struggling with old and new signal integrity issues as they drive toward designs in the 5 to 10 Gbit/s range, according to a panel of experts at DesignCon. The panel is a regular fixture at the event, drawing nearly 150 people this year.

The problems rise in tandem with a slate of new high-speed serial system interfaces. Engineers are now implementing 5 GHz PCI Express 2.0, 6 GHz Serial ATA and Serial-Attached SCSI and USB 3.0 which aims to deliver up to 8 Gbits/s.

"We've lost our [signaling] headroom," said Tom Waschura, founder and chief technology officer of Synthesis Research Inc. (Menlo Park, Calif.), maker of the Bertscope. "If you sit on some of the telephone conference calls for these standards bodies you will hear them fighting over every inch of dB," he added.

The I/O Buffer Information Specification (IBIS) group defined a standard applications programming interface more than a year ago to provide engineers data needed to handle tight signaling budgets. The so-called Bird API lets vendors of transceivers and testers report details of their chips and equipment without giving away proprietary information.

"The current challenge is getting [the API] supported," said Xiaoxiong Gu, an I/O subsystem researcher at IBM's T. J. Watson Center. "Unfortunately the serdes models are not often available and support is spotty at best," he said.

An engineer from Freescale in the audience highlighted the industry paranoia that has slowed adoption of the standard. "Why do I have to specify my intellectual property, why can't I just tell you what comes in and out," he asked.