News & Analysis
Crocus enters STT-MRAM race
Anne-Francoise Pele
10/1/2009 2:01 PM EDT
Crocus said its STT-MRAM technology targets high-end mobile phones, netbook computers, rotating media and solid-state disk drives, enterprise-class storage systems, network equipment, high-reliability industrial and automotive uses, as well as other applications where MRAM can solve the system problems associated with 'instant power-on' and zero-risk recovery from power interruptions.
STT-MRAM is a second-generation magnetic-RAM technology that is said to solve some of the problems posed by conventional MRAM structures. Most MRAMs that are now being developed write data by applying the magnetic field generated by a current running through a wire near a tunneling magnetoresistive (TMR) element to change the magnetization. That enables fast operation, but gobbles up power.
Among other companies looking to devise the technology are Everspin, Grandis, IBM-TDK, Samsung, Toshiba and Avalanche Technology.
Crocus said it tackles two challenges in the implementation of STT-MRAM, namely memory bit density and stability. The MRAM startup indeed claimed it has developed a magnetic cell with a dynamic (i.e. sub-10 nanosecond) write current level of 2x10(6) amp/cm(2), e.g. less than 100A write current per bit.
Crocus was first incorporated in France in 2004 with an initial grant from CEA Valorisation and FIST, the subsidiaries of CEA and CNRS, France's leading research organizations, dedicated to spinning off promising new technologies into the private sector. The MRAM technology that is the foundation on which Crocus is built was developed in the Grenoble-based Spintec research center.
In June, Crocus received a $1.25 million investment and expanded its foundry alliance with Israel's Tower Semiconductor Ltd.
Under the terms of the alliance, Crocus said it has transferred its Thermally Assisted Switching (TAS) technology to Tower for full-scale production implementation. Crocus' TAS-MRAM products, manufactured using 130nm and 90nm processes, target standalone SRAM replacement and embedded memory in microcontrollers, while STT is focused on higher density applications such as embedded cache and NOR-Flash replacement in System-on-Chip designs made with 65nm or smaller processes.

