News & Analysis

ISSCC: IBM back in network processor game

Rick Merritt

2/8/2010 9:29 PM EST

IBM's most complex chip
SAN FRANCISCO, Calif. — Claiming it sees a new opportunity where server and networking chips converge, IBM Corp. unveiled Monday (Feb 8.) what it hopes will be the first of a new line of chips that essentially puts it back into the network processing business.

In a paper at the International Solid State Circuits Conference (ISSCC) IBM described what it calls a wire-speed processor. The 45nm SOI chip is built up from a number of accelerators and 16 cores based on a new 64-bit embedded PowerPC processor capable of handling four threads.

"This is probably the most complex chip IBM has ever built in its history," said Charles Johnson, chief architect of wire-speed processors at IBM.

Charles Johnson
Chief Architect, Wirespeed Processors, IBM

The 16-core chip packs 1.43 billion transistors into a 428mm-squared die. By contrast IBM's high-end server CPU, the eight-core Power7, puts 1.2 billion transistors in a 567mm-squared die.

"We realized this might be more complex than Power7 when the IBM fab people start telling us our masks were so hard to build, so we started counting the transistors on the chip," Johnson said.

Unlike the Power7 which aims at highest performance, the wire-speed processor is aimed at highest throughput per Watt. Versions of the chip may span a range from 2.3 GHz 16-core chips consuming 65W to four-core versions at 1.4 GHz consuming 20W.

Johnson said the chip stands in between a multicore server processor like Sun Microsystem's Niagara and a more conventional packet processors from companies such as Cavium Networks or RMI.

"It's not a network processor or a server processor but a middle ground, a blurring of the two worlds," Johnson said.

The chips will be used in a range of standalone systems and PCI Express adapter cards in servers. It is mainly designed for use in IBM's own systems, however the company is willing to sell it on a merchant basis as well.

Johnson declined to detail applications for the chip, deferring to an issue of an IBM Research journal coming out in about a month. He did say IBM's software division has worked closely with the processor team.

"Wire-speed processors are an extreme example of workload-optimized computing," Johnson said.





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