News & Analysis
Numonyx set to discuss potential PCM "showstopper"
Peter Clarke
4/13/2010 8:51 AM EDT
Two other papers at the conference raise thermal and noise effects as potential reliability issues for phase-change memory.
The issue of current density is described by the researchers in the abstract for their paper — 5C4 in the program — as a potential "showstopper" to the scaling of PCM beyond the 32-nm manufacturing process node. The paper is due to be presented at 9:45am on Thursday May 6 and its contents may help to determine whether phase-change memory has a future as a mainstream semiconductor memory technology.
The abstract acknowledges that current density needed to program phase-change memory increases linearly with lithography reduction and will be of the order of 20-MA per square centimeter in the select transistor and 200-MA per square centimeter in the storage element at the 16-nm node.
"The aim of the paper is to investigate the impact of increasing current density on function and reliability down to the 16-nm node," the abstract states.
Paper 2C5, authored by a team from Stamford University and due to be presented on Tuesday May 4, looks at the impact of thermal cross-talk disturbance on the reliability of phase-change memory. The abstract states that the thermal disturbance can produce a 100 percent variation in threshold switching voltage. The authors propose a method to exploit thermal disturbance to improve the reliability of multi-bit per cell operation.
The abstract for paper 6C3, from researchers at Politecnico di Milano, deals with the so-called Telegraph noise effect, which it states has recently been observed in phase-change memories as a result of cell downscaling. The paper studies random telegraph noise in PCM in the frequency and time domains and discusses possible physical origins for the noise.
Related links and articles:
Micron-Numonyx deal: What analysts are saying
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jnhong
4/13/2010 12:22 PM EDT
20 MA is 20 Mega Amperes. This kind of mistake in an electrical engineering publication is simply NOT ACCEPTABLE.
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dirk.bruere
4/13/2010 2:30 PM EDT
Looks like memristor tech will win out
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Avagadro
4/14/2010 1:01 PM EDT
What's a few orders of magnitude among friends????
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Peter Clarke
4/14/2010 3:59 PM EDT
To J N Hong and Worker Bee
I have quoted directly from the abstract of the Numonyx paper, as published by the IRPS organization. Readers can follow the link to http://irps.org and then navigate to find the program and the paper at "http://irps.org/conf-info/Thursday_Program.pdf" target="_new" >http://irps.org/conf-info/Thursday_Program.pdf.
Please bear in mind that the authors are dicussing current density and have chosen to use units of amperes per square centimeter, which is quite usual. The conducting channels are of nanometer dimensions.
My understanding is that current densities of 10^5, 10^6 and 10^7 A/cm^2 are quite usual in microelectronic structures. Clearly 2 x 10^8 A/cm^2 is extreme but that is the point of the paper.
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zman_tekinsil
4/14/2010 11:29 PM EDT
A/cm2 unit represents current density which is standard in semiconductor devices. For instance, in the 200 MA/cm2 and 16nm node/size one would get a current of 600um for that given node (assuming a square 16x16 nm2), which cannot be easy to visualyze if compared to the "current" of another size.
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zman_tekinsil
4/14/2010 11:36 PM EDT
Ooops typo: meant ...one would get a current of 600mA...
Sorry!
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jnhong
4/16/2010 5:01 PM EDT
OK now I get it. Thanks for the clarification.
It's still hard to see where all the current will come through. There's only so much metal in the stack and you still have contacts and vias which not support such current densities. It's not just at the transistor/channel level where the current density issues will occur.
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zman_tekinsil
4/16/2010 6:51 PM EDT
The current is not the 200MA/cm2 in the 16nm feature. It is the 600uA. I assume they meaured roughly 600uA and devide by 16nm x 16nm area to get to 200MA/cm2. Reverse thinking: if you bundle in parallel a bunch of those 16nm features to form an array that has an area of 1cm2, than you will need 200 MA to program them all together.
So in other words, the concern in the article is that 600uA is large for 16nm node. Therefore the viability of PCM for memory is in question!
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