Intel builds SRAM in 65-nm manufacturing process, says report

LONDON -- Intel Corp. has built fully functional SRAM chips using a 65-nanometer manufacturing process, its next-generation high-volume semiconductor manufacturing process, according to a report in the Channel Times. The achievement puts Intel is on track to put this process into production in 2005 using 300-mm wafers, the report said. "This accomplishment puts Intel's 65-nm technology on a fast track to extend our 15-year record of ramping production on a new process generation every two years. In fact, only 20 months have elapsed since we disclosed achievement of fully functional SRAMs on our 90-nm process, which is now ramping," the report quoted Sunlin Chou, senior vice president and general manager of Intel's technology and manufacturing group, as saying.

The 65-nm process includes both higher-performance and lower-power transistors, a second-generation version of Intel's approach to strained silicon, copper interconnects and a low-k dielectric material, the report said.

The report, which could be found here when this story was first posted, did not say what size of SRAM memory circuit Intel had manufactured.