Micron drops MRAM, phase-change, mulls other memories

LONDON — U.S. memory chip maker Micron Technology has stopped R&D work on magnetic RAM and is doubtful about phase-change memory, two approaches to non-volatile memory being pursued elsewhere. The reason Micron is moving away from the technologies is because the company does not see how they would scale effectively with Moore's Law and justify commercialization.

Instead Mark Durcan, chief technology officer at Boise, Idaho-based Micron Technology Inc. sees a couple of other technologies with potential. Durcan declined to elaborate. However, in the near term nano-crystalline flash would appear to score well on a chart of non-volatile memory options Durcan presented to financial analysts in London.

"As those who have studied our patent portfolio will know, we have done a lot of work in MRAM. About a year ago we stopped. We don't see a clear path. The [hyterisis] window between 1 and 0 was closing as we scaled physical volume. Without some breakthrough in the material or circuit layout it wasn't going to scale," Durcan told Silicon Strategies.

"We've done some phase-change work over the years. The situation is not quite as bleak [as MRAM] but it's still negative. Here the case is that programming currents are coming down as we scale but they are not coming down fast enough to scale with Moore's Law," Durcan said. He explained that memory capacity scales roughly as the square of linear dimensions and so, unless programming current scales faster than the square, a device would require more current at each generation for programming its bits.

"There are technologies that do scale. We see a couple of opportunities," Durcan said. He declined to elaborate on which technologies he sees as the leading contenders for non-volatile memory.

To judge from Durcan's presentation nano-crystalline flash or engineered tunnel barrier (ETB) memory, due to become available in 2006, should appeal to Micron.

In nanocrystal flash the memory effect is based on charge-trapping at grain boundaries in a thin layer of polycrystalline silicon, rather than on a floating gate. Motorola demonstrated a 4-Mbit test array on 200-mm diameter wafers using a 90-nm manufacturing process technology in March 2003 . It is a close relative of floating gate flash memory that Micron is already making, and has a small cell size of 4F2.

Micron is an advocate of taking the benefit of a small memory cell size, as in the case of its 6F2 DRAM cell, as minimum geometries are shrunk. Some time after 2010 some sort of bistable molecular NEMS device has the potential for size advantage with a cell size of 2F2, Durcan said in a presentation which could be found here when this story was first posted.