Tezzaron debuts 'super-8051' chip with 3D technology

The core uses a RISC instruction set and a floating-point design. This "super-8051" product is a ten-million transistor design targeting high-end embedded applications, according to the company (Naperville, Ill.).

The 3D chip is built in Tezzaron's FaStack wafer-stacking process. Short vertical connections provide quick access to the SRAM, which can run at 225-MHz with less than 3-ns latency.

The bare chip, manufactured in a 180-nm process, measures 3.7- x 3.6-mm. The finished device is housed in a standard 132-PGA package.

Last month, South Korea's MagnaChip Semiconductor Ltd. and Tezzaron announced a partnership that could enable what the companies claim are the world's first and true 3D chips. Tezzaron also rolled out what the company claims is the world's first re-programmable 3D RAM chip. The device, to be marketed and sold by Tezzaron, has been tested at clock rates higher than 500-MHz with less than 2-ns latencies (see Nov. 19 story).