EDA at a crossroads over Verilog's future

SAN DIEGO — A decision by the Accellera standards organization to position SystemVerilog as a separate IEEE standard may make for a lively Design Automation Conference here if proponents of the move clash with critics who fear it will result in two incompatible versions of Verilog. A prominent SystemVerilog backer has gone so far as to warn that a separate standard eventually will die.

In what some see as a surprise move driven by competitive posturing among EDA vendors, Accellera voted on May 17 to donate SystemVerilog 3.1a to a new working group, IEEE 1800, within the IEEE Standards Association's recently formed Corporate Advisory Group (CAG). In doing so, Accellera has bypassed the IEEE 1364 Verilog Standards Group, which is responsible for Verilog standardization and is already at work on Verilog 2005, a version largely derived from SystemVerilog.

Two separate Verilog standardization efforts, thus, would operate within the IEEE. Critics fear the work will prove difficult or impossible to coordinate, even though Accellera has requested that the IEEE appoint a liaison between the working groups.

Consultant Stuart Sutherland, who is both an active IEEE 1364 member and a nonvoting Accellera director, reveals in an "EDA Views" column how the various Accellera directors voted, following party lines. Synopsys Inc. and Mentor Graphics Corp., strong SystemVerilog and Accellera backers, voted for standardization through the CAG. Cadence Design Systems Inc. and Verisity Design Inc., which were originally skeptical about SystemVerilog and which donated their own technology for Verilog 2005, voted for standardization via IEEE 1364.

The primary stated rationale for the Accellera decision is that the CAG offers a faster path to standardization. It has a policy of one vote per company, as opposed to the IEEE 1364 policy of one vote per participant. "I think we'll have a strong standard in place sooner than something that might take years to evolve," said Accellera chairman Dennis Brophy.

User feedback, not EDA vendor posturing, was crucial to Accellera's decision, Brophy said. Indeed, Accellera directors from several user companies voted to pursue standardization through the CAG.

But Sutherland argues in his column that Accellera's reasoning is fundamentally flawed. Providing an insider's view, he rebuts a number of arguments that Accellera directors raised for pursuing the separate standard. And he warns that a separate SystemVerilog standard will languish. Either SystemVerilog and the parent Verilog standard will evolve in different directions, Sutherland predicts, or the 1364 group will unsuccessfully try to duplicate SystemVerilog extensions.

"The outcome, either way, is that Accellera has chosen to doom SystemVerilog for political reasons and the personal biases of some members of the Accellera board of directors," he says in the column.

When Accellera announced its May 17 decision, Mike McNamara, IEEE 1364 chairman and senior vice president at Verisity, called the move "a step backward for the industry." He said it would take "incredible efforts" to prevent a language schism from occurring, and he noted that both Accellera participants and IEEE 1364 members had expected that SystemVerilog 3.1a would go to the IEEE 1364 group for standardization.

Gary Smith, chief EDA analyst at Gartner Dataquest, said two issues are at stake: competitive jockeying among EDA companies and questions about the scope, speed and adoption of a SystemVerilog standard. "What has impressed me is how badly Accellera is handling this issue," Smith said. "It's almost as if they are positioning this as Accellera and the EDA vendors vs. the design-engineering community on purpose."

To be sure, Accellera's decision has supporters as well as detractors. "By working with the CAG, Accellera has assured the most effective, efficient pathway to ratification," said Rich Goldman, vice president of strategic market development at Synopsys.

"Accellera's path in the IEEE matches the demands customers are placing on getting standards done with greater efficiency," said Robert Hum, vice president and general manager of Mentor's functional verification division. Goldman said the IEEE CAG addresses the need for "fast, market-relevant standards." Compared with legacy IEEE working groups, he said, it provides "consistent" policies and procedures, has a "one company, one vote" policy, offers a professional staff and provides liaisons with international standards organizations.