Who loves ya, baby?

Who loves ya, baby?
Rob Rutenbar was excited about Broadcom's acquisition of Pivotal Technologies, a deal worth $242 million. "When a company the size and stature of Broadcom acquires an analog IP company," Rutenbar beamed, "That should tell you something about the value of analog design skills."

Both Rutenbar, a Carnegie Mellon professor, and K.C. Murphy, Pivotal's president and CEO, are due to participate in a panel I'm chairing on "Design Strategies for Mixed-Signal Systems on Chip" at the Design Automation Conference in Los Angeles this week. They will turn their focus to the design tools for incorporating analog blocks - amplifiers, data converters, phase-locked loops, Ethernet cable drivers, even RF transceivers - on new-generation mixed-signal circuits.

While they are best of friends, I worry that they will go for each other's throats when the panel meets because they seem to be at opposite poles regarding analog circuit synthesis.

Rutenbar has been something of a crusader for the notion of analog synthesis, and I expect him to lobby for synthesis (with both circuit and geometry tools), saying, this stuff is too complicated to do by hand. But I've seen some of K.C. Murphy's foils. His approach is much more hands-on. In the best "Ramada-vs.-Holiday Inn, and, boy, does your breath stink" competitive style, Murphy shows the jitter window (3 ps) for 0.18-micron, 1.8-V PLL and says, "Synthesize THIS!"

The early synthesizers developed at Carnegie Mellon worked like some of the early "silicon compilers." They evaluated a circuit topology and searched a library of preassembled analog blocks and components to see whether they would be useful in implementing that topology. Rutenbar and his students' most recent work has concentrated on networking computers and tweaking the search algorithms in an effort to reduce the time it takes to actually build something.

Critics of this approach, like Mar Hershenson of Barcelona Design, say (hey!) this is an awful lot of machine time just to build an op amp. (Barcelona's approach to "synthesis" is to hand you the model for a TSMC op amp cell - a physically existing part - and invite you to tweak it with its online simulator. If you can tweak the part to your liking, and then pay Barcelona to give you the RTL, you say, "Great tool, great service." But if the simulator reports, "Sorry, I can't build THAT part in THIS process," and you say, "Okay, I give up; I'll just take what you've got" - is that called synthesis?)

To Rutenbar's credit, commercial companies like Antrium Design Systems (whose president, Roy McGuffin, will be on the panel) use the same approach. The difference is that Antrium's tools insist on a "directed search" - that is, requiring an analog expert user to define as closely as possible what he is looking for - plus an overstocked library of highly characterized, process-specific cell blocks.

Rudolf Koch of Infineon Technologies in Germany takes a "walk before you run" attitude toward analog synthesis. You'll have enough trouble getting an RF designer just to document what he does, to make a digital model of his device, let alone incorporate that model into a grand synthesis plan. A lot of what passes for synthesis these days, says Koch, is optimizing an existing device by resizing it. But the starting point for any kind of mixed analog-digital design is invariably good models for the cells or functions you intend to use.

What all my panelists have in common is a feeling that the mixed-signal SoCs of the future will be effectively mixed analog-digital circuits constructed in small-geometry digital CMOS. Thus, the major issue is not whether you can synthesize it or need to handcraft certain elements, but rather what is the nature of the analog cell blocks and how do they interact with the digital. Panelists Henry Chang of Cadence Design Systems, who has participated in the Virtual Socket Initiative Association's efforts to define criteria for the exchange of analog IP, calls for a "platform" - a modular host IC that would allow plug-and-play between various IP blocks, analog or digital.

Remember the "fab manager?" In my memory this was the process engineer who would look over your shoulder at the IC layout you did on a GE Calma system - he would look at the polygons! - and say, "You know, this thing will yield a whole lot better if you move that block a little to the left." In contemporary terms, this is the guy who knows what he's looking at when he sees the graphics generated by a Snaketech or other substrate noise-analysis tool, the one who knows some layout techniques for reducing the noise coupling between RF and digital portions of, say, a Bluetooth radio. Even Rob Rutenbar would say we need new tools for visualizing the "evil interactions" among RF, analog, DSP and ASIC components on an SoC.

Some of this heightened concern over mixed-signal IC design strikes me like the promotional trick played by Isadore Katz, a former Dataquest analyst, when he became marketing chief for HSpice developer Meta Software. Meta's modelers noticed that the behavior of CMOS transistors did not scale linearly with deep submicron geometries; that below 0.5 micron the effects of parasitics (gate capacitance and interconnect resistance) became much more pronounced and exaggerated. Katz went on a nationwide press tour to promote the "coming crisis in deep submicron design." He scared a bunch of people, got his picture on the cover of a number of trade magazines and undoubtedly raised the profile of the Hailey brothers (not to mention the valuation of their modeling company).

But in the ongoing transitions from 0.5-, to 0.35-, to 0.25-, to 0.18-, to 0.13-micron geometries (and so forth), neither the semiconductor nor EDA industries ground to a halt. Rather, new characterization, library- and model-building tools, along with small armies of foundry support personnel, worked like hell to make sure every simulator would know how these blocks, gates and transistor switches would function at smaller geometries. And Meta Software, with revenues of about $20 million, was bought by Avant! for $160 million. Make enough noise about a problem, I suppose, and the venture capital community is bound to throw money.

I'm sure the idea of a leading communications company acquiring an analog design house appeals to Rutenbar. He has an interest in Pittsburgh's own Neo Linear Corp., a company that has specialized in tools for analog cell design. Georges Gielen, the professor from Katholieke Universiteit in Leuven, Belgium, sits on Antrim's board of directors. We know that our attachment to things analog makes us unusual; but will it make us rich? Let's hope so.