The phase reversal story

As has become normal for this column, my caller had a problem that was causing him significant grief. The circuit worked as planned most of the time, but at just the wrong time the output would slam from near full scale negative to full scale positive. As the input signal pulled away from the negative rail the output would return to the correct value so this was not a latch-up condition. The obvious questions were why, and even more important, how to fix it.

I requested a circuit diagram, which I have included here. This simple buffer circuit is used so widely that it could not be at fault. The op amp was one of our older devices that still had plenty of applications; however, there was one problem with its performance. It demonstrated phase reversal or phase inversion. I mentioned this term and he reported that he had heard of it but was not able to find a definition. The only references were assorted claims that a particular amplifier did not do it. He could not find a definition of the action.

Phase reversal is a condition that may occur with op amps and instrumentation amplifiers when the applied input common mode voltage approaches a voltage outside of the specified common mode voltage range. At that point the output slams to the opposite rail. Amplifier data sheets are confusing to the point that some amplifiers attempt to reassure the user that they do not display this action. CMOS amplifiers seem to be the most robust in not displaying this action.

Phase reversal occurs when a common-mode voltage, outside of the specified maximum range, causes the input stage to interact with the second stage causing an action that appears as if the input pins were reversed. This is sometimes accompanied by a significant increase in input bias current. IC designers have long-known the causes and now can avoid the problem; however, there are some useful devices still available that display the tendency. As operational amplifiers have evolved through the design cycles the performance has improved. Operating common mode voltage has gone beyond the rails in many designs.

Predicting when phase inversion will appear can be tricky. Amplifiers with a bipolar transistor input stage are at high risk. Those with JFET inputs are very close behind in showing this trait. The CMOS devices are the most immune. To avoid phase inversion simply keep the common-mode voltage within the limits given in the data sheet. Most amplifiers will be phase-reversal-free through the limits on the absolute values table.

Once we have identified the problem the next phase is to design a cure. In this particular case the cure is a diode pair and a series resistor. In normal operation there would be a minimal bias current through the input pin so the series resistor will not be noticed but when the common mode voltage limit is exceeded and unwanted conduction begins, the resistor limits the current and prevents phase inversion. The resistor value should be selected to limit the current through the input pin to the absolute maximum value when the applied input voltage is at the most extreme.

Thanks for readingComments Please. klein_bill@ti.com And be sure to copy, you-know, sohr@cmp.com

Editor's Note: Bill Klein hosts a series of informative online seminars called Analog eLab.